AUIRFR5410 Datasheet, PDF (4/10 Pages) International Rectifier – Advanced Planar Technology

2000
1600
V _GS = 0V,
f = 1MHz
C_iss = C_gs + C_gd , C_ds SHORTED
C_rss = C_gd
C_oss = C_ds + C_gd
1200
800
400
C_iss
C_oss
C_rss
0
A
1
10
100
-V_DS , Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
AUIRFR5410
20 _{ID = -8.4A}
15
V_DS =-80V
V_DS =-50V
V_DS =-20V
10
5
FOR TEST CIRCUIT
SEE FIGURE 13
0
0
10
20
30
40
50
60
Q_G, Total Gate Charge (nC)
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
100
T_J= 150 °C
10
T_J = 25 °C
1
0.1
0.2
V _GS = 0 V
0.8
1.4
2.0
2.6
-V_SD ,Source-to-Drain Voltage (V)
Fig. 7 Typical Source-to-Drain Diode
Forward Voltage
4
1000
OPERATION IN THIS AREA LIMITED
BY R_DS(on)
100
10us
100us
10
T_C
T_J
=
=
25 °C
150 °C
Single Pulse
1
1
10
1ms
10ms
100
1000
-V_DS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
2015-12-2