XC886CLM_09 Datasheet, PDF (36/144 Pages) Infineon Technologies AG – 8-Bit Single Chip Microcontroller

XC886/888CLM
Functional Description
Field
OP
0
Bits Type Description
[7:6] w Operation
0X Manual page mode. The value of STNR is
ignored and PAGE is directly written.
10 New page programming with automatic page
saving. The value written to the bit positions of
PAGE is stored. In parallel, the previous
contents of PAGE are saved in the storage bit
field STx indicated by STNR.
11 Automatic restore page action. The value
written to the bit positions PAGE is ignored
and instead, PAGE is overwritten by the
contents of the storage bit field STx indicated
by STNR.
3
r
Reserved
Returns 0 if read; should be written with 0.
3.2.3 Bit Protection Scheme
The bit protection scheme prevents direct software writing of selected bits (i.e., protected
bits) using the PASSWD register. When the bit field MODE is 11_B, writing 10011_B to the
bit field PASS opens access to writing of all protected bits, and writing 10101_B to the bit
field PASS closes access to writing of all protected bits. In both cases, the value of the
bit field MODE is not changed even if PASSWD register is written with 98_H or A8_H. It can
only be changed when bit field PASS is written with 11000_B, for example, writing D0_H to
PASSWD register disables the bit protection scheme.
Note that access is opened for maximum 32 CCLKs if the “close access” password is not
written. If “open access” password is written again before the end of 32 CCLK cycles,
there will be a recount of 32 CCLK cycles. The protected bits include the N- and K-
Divider bits, NDIV and KDIV; the Watchdog Timer enable bit, WDTEN; and the power-
down and slow-down enable bits, PD and SD.
Data Sheet
29
V1.2, 2009-07