BTS50015-1TAD Datasheet, PDF (34/51 Pages) Infineon Technologies AG – Smart High-Side Power Switch

BTS50015-1TAD
Smart High-Side Power Switch
Functional Description
5.4.3.2 SENSE Signal Timing
Figure 29 shows the timing during settling and disabling of the sense.
V_IN
t <t _{t >t OF F IN (RESETD EL AY) OF F IN (RESETD EL AY)}
Short /
t
Ove rt emp.
V_OUT
t
I_IS
latch
no
reset
reset
I_IS
(fault
t
)
I_{IS 1..4}
t
V_IN
I_L
90% of
IL s tat ic
V_OUT
I_IS
90% of
IS s tat ic
tO N
ts IS(O N)
tpIS(O N)_90
ts IS(L C)
Figure 29 Fault Acknowledgement
V_IN
t _Short
circuit
t
V_OUT
t
I_IS
t
tp IS(FAU L T)
t
t
3V
t
I_{IS (fault)}
I_{IS 1..4}
t
5.4.3.3 SENSE Signal in Case of Short Circuit to V_S
In case of a short circuit between OUT and VS, a major part of the load current will flow through the short
circuit. As a result, a lower current compared to the nominal operation will flow through the DMOS of the
BTS50015-1TAD, which can be recognized at the current sense signal.
5.4.3.4 SENSE Signal in Case of Over Load
An over load condition is defined by a current flowing out of the DMOS reaching the current over load I_CL or the
junction temperature reaches the thermal shutdown temperature T_J(TRIP). Please refer to Chapter 5.3.6 for
details. In that case, the SENSE signal will be in the range of I_IS(FAULT) when the IN pin stays HIGH.
This is a device with latch functionality. The state of the device will remain and the sense signal will remain on
I_IS(FAULT) until a reset signal comes from the IN pin. For example, when a thermal shutdown occurs, even when
the over temperature condition has disappeared, the DMOS can only be reactivated when a reset signal is sent
to the IN pin.
Data Sheet
34
Rev. 1.0
2016-02-26