XC2766X_08 Datasheet, PDF (31/112 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller with 32-Bit Performance

XC2766X
XC2000 Family Derivatives
Functional Description
3
Functional Description
The architecture of the XC2766X combines advantages of RISC, CISC, and DSP
processors with an advanced peripheral subsystem in a well-balanced design. On-chip
memory blocks allow the design of compact systems-on-silicon with maximum
performance suited for computing, control, and communication.
The on-chip memory blocks (program code memory and SRAM, dual-port RAM, data
SRAM) and the generic peripherals are connected to the CPU by separate high-speed
buses. Another bus, the LXBus, connects additional on-chip resources and external
resources (see Figure 3). This bus structure enhances overall system performance by
enabling the concurrent operation of several subsystems of the XC2766X.
The block diagram gives an overview of the on-chip components and the advanced
internal bus structure of the XC2766X.
PSRAM
32 Kbytes
Program Flash 0
256 Kbytes
Program Flash 1
256 Kbytes
Program Flash 2
256 Kbytes
DPRAM
2 Kbytes
DSRAM
16 Kbytes
CPU
C166SV2 - Core
System Functions
Clock, Reset, Power Control,
Stand-By RAM
Interrupt& PEC
Interrupt Bus
OCDS
Debug Support
EBC
LXBus Control
External Bus
Control
WDT
RTC
ADC1 ADC0
8-Bit/ 8-Bit/
10-Bit 10-Bit
8 Ch. 16 Ch.
GPT
T2
T3
T4
... CC2 CCU63 CCU60
T7 T12
T12
T8 T13
T13
T5
BRTG6en
USIC2 USIC1 USIC0
2 Ch., 2 Ch., 2 Ch.,
64 x 64 x 64 x
Buffer Buffer Buffer
Multi
CAN
RS232, RS232, RS232,
LIN, LIN, LIN,
SPI, SPI, SPI,
IIC, IIS IIC, IIS IIC, IIS
2 ch.
P15 Port 5
5
11
P10
16
P7 P6 P4
53 4
P2 P1 P0
13 8 8
Figure 3 Block Diagram
MC_XC276X_BLOCKDIAGRAM
Data Sheet
29
V2.1, 2008-08