TLE7270 Datasheet, PDF (3/14 Pages) Infineon Technologies AG – 5-V Low Drop Voltage Regulator

TLE 7270
GND
I RO DT Q
AEP02825_7270
Figure 2 Pin Configuration P-TO252-5-1 (D-PAK), P-TO263-5-1 (top view)
Table 1
Pin Definitions and Functions
Pin No. Symbol Function
1
I
Input; block to ground directly at the IC with a ceramic capacitor.
2
RO
Reset Output. Open Collector Output with integrated pull-up
resistor of typically 30kΩ. Optional external pull-up resistor of
≥ 10 kΩ to pin Q.
3
GND Ground; Pin 3 internally connected to heatsink.
4
DT
Delay Time; connect to Q or GND to choose reset delay time.
5
Q
Output; block to ground with a ceramic capacitor, C ≥ 470 nF.
Data Sheet
3
Rev. 1.03, 2004-10-14