SLE66CLX641P Datasheet, PDF (3/11 Pages) Infineon Technologies AG – Security & Chip Card ICs

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SLE 66CLX641P
16-Bit High Security Contactless Controller
ISO/IEC 14443 Type A &B Compliant Interfaces
For Contactless Operation with MMU in 0.22 µm CMOS Technology
136-Kbyte ROM, 5-Kbyte RAM, 64-Kbyte EEPROM
1100-Bit Advanced Crypto Engine supporting RSA and Elliptic Curve GF(p) and
112-Bit / 192-Bit DDES-EC2 Accelerator
supporting DES, 3DES and Elliptic Curve GF(2n)
Features
• Enhanced low power 8051 CPU with
extended addressing modes for
contactless smart card applications
• Instruction set opcode compatible with
standard 8051 processor with additional
powerful instructions optimized for smart
card application
• Enhanced architecture with execution time
6 times faster (18 times using PLLmax)
than standard 8051 processor at same
external clock
• 134 Kbytes User ROM for operating system
and application (programs & data)
• 2 Kbytes reserved ROM for Resource
Management System (RMS_E) with
Contactless Optimized EEPROM
write/erase routines
• 64 Kbytes Secure EEPROM in SuperSlim
technology for application program and
data
• 4k bytes XRAM, 700 bytes Crypto-RAM
and 256 bytes internal RAM for fast data
processing
• Memory Management Unit
• Certified True Random Number Generator
• Dual Key Triple DES (DDES) &
GF (2ⁿ) Elliptic Curve (EC2) Accelerator
• Advanced Crypto Engine for Elliptic
Curve GF(p) and up to 2048 bits RSA
computation
• CRC Module according to ISO/IEC 3309
supporting CCIT v.41 & HDLC X25
• 8 Interrupt Vectors Module with 3 priority
levels to ensure real time operation
• PLL: to speed up the internal CPU clock
frequency up to 15MHz (optional use)
• Two 16-bit Timer with interrupt capability for
protocols, security checks & watch dog
implementations
• Power saving sleep mode
• Temperature range:
contact-less: -25°C to +70°C
Full operation of Contactless interface
controlled by Operating System
enhances Security Level
Contactless Interface
• Interface according to ISO/IEC 14443 for
both Type A and Type B
• Carrier frequency 13.56 MHz
• Data rate
106 Kbit/s in type A operation
up to 848 Kbit/s in type B operation
• Anticollision & Transmission Protocol
supported by open source application
notes for both Type A & B
• Flexible Internal CPU clock frequency:
fully configurable from 1.7MHz up to
15 MHz
• 256 bytes buffer for contactless data
exchange (FiFo circular architecture)
• Parallel operation of CPU, Peripherals like
DES, CRC and Contactless Interface
possible for High Demanding Contactless
Applications
Short Product Information
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2004-04-27