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IPD100N06S4-03 Datasheet, PDF (3/9 Pages) Infineon Technologies AG – OptiMOS-T2 Power-Transistor
IPD100N06S4-03
Parameter
Dynamic characteristics2)
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Gate Charge Characteristics2)
Gate to source charge
Gate to drain charge
Gate charge total
Gate plateau voltage
Reverse Diode
Diode continous forward current2)
Diode pulse current2)
Diode forward voltage
Reverse recovery time2)
Symbol
Conditions
C iss
C oss
Crss
t d(on)
tr
t d(off)
tf
V GS=0V, V DS=25V,
f =1MHz
V DD=30V, V GS=10V,
I D=100A, R G=3.5Ω
Q gs
Q gd
V DD=48V, I D=100A,
Qg
V GS=0 to 10V
V plateau
IS
I S,pulse
T C=25°C
V SD
V GS=0V, I F=100A,
T j=25°C
t rr
V R=30V, I F=50A,
di F/dt =100A/µs
min.
Values
typ.
Unit
max.
-
7980 10400 pF
-
1960 2540
-
75
150
-
30
- ns
-
70
-
-
40
-
-
5
-
-
44
57 nC
-
10
20
-
99
128
-
5.6
-V
-
-
100 A
-
-
400
0.6
0.95
1.3 V
-
125
- ns
Reverse recovery charge2)
Q rr
-
110
- nC
1) Current is limited by bondwire; with an R thJC = 1.0K/W the chip is able to carry 154A at 25°C.
2) Specified by design. Not subject to production test.
3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
Rev. 1.0
page 3
2010-02-11