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IPD040N03LG Datasheet, PDF (3/10 Pages) Infineon Technologies AG – OptiMOS3 Power-Transistor
Parameter
Symbol Conditions
IPD040N03L G
IPS040N03L G
min.
Values
typ.
Unit
max.
Dynamic characteristics
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
C iss
-
C oss
V GS=0 V, V DS=15 V,
f =1 MHz
-
Crss
-
t d(on)
-
tr
V DD=15 V, V GS=10 V,
-
t d(off)
I D=30 A, R G=1.6 Ω
-
tf
-
Gate Charge Characteristics6)
Gate to source charge
Gate charge at threshold
Gate to drain charge
Switching charge
Gate charge total
Gate plateau voltage
Gate charge total
Gate charge total, sync. FET
Output charge
Q gs
-
Q g(th)
-
Q gd
V DD=15 V, I D=30 A,
-
Q sw
V GS=0 to 4.5 V
-
Qg
-
V plateau
-
Qg
V DD=15 V, I D=30 A,
V GS=0 to 10 V
-
Q g(sync)
V DS=0.1 V,
V GS=0 to 4.5 V
-
Q oss
V DD=15 V, V GS=0 V
-
Reverse Diode
Diode continuous forward current I S
-
T C=25 °C
Diode pulse current
I S,pulse
-
Diode forward voltage
V SD
V GS=0 V, I F=30 A,
T j=25 °C
-
Reverse recovery charge
Q rr
V R=15 V, I F=I S,
di F/dt =400 A/µs
-
6) See figure 16 for gate charge parameter definition
Rev. 1.02
page 3
2900
1100
60
7.4
6.8
27
4.2
3900 pF
1500
-
- ns
-
-
-
8.8
- nC
4.7
-
4.2
-
8.3
-
18
24
3.0
-V
38
-
16
21 nC
28
-
-
66 A
-
400
0.83
1.1 V
-
20 nC
2008-04-15