TDA7100 Datasheet, PDF (29/41 Pages) Infineon Technologies AG – 434 MHz ASK/FSK Transmitter in 10-pin Package

TDA7100
Applications
depending on the clock frequency and the load capacitance CLD (PCB board plus input
capacitance of the microcontroller). RL can be calculated to:
1
RL = _{fCLKOUT *8* CLD}
Table 9
Remark:
Clock Output
CL[pF]
5
10
20
fCLKOUT=847.5 kHz
RL[kOhm]
27
12
6.8
To achieve a low current consumption and a low
spurious radiation, the largest possible RL should be chosen.
Even harmonics of the signal at CLKOUT can interact with the crystal oscillator input
COSC preventing the start-up of oscillation. Care must be taken in layout by sufficient
separation of the signal lines to ensure sufficiently small coupling.
3.9
Application Hints on the Power-Amplifier
The power amplifier operates in a high efficient class C mode. This mode is
characterized by a pulsed operation of the power amplifier transistor at a current flow
angle of θ<<π. A frequency selective network at the amplifier output passes the
fundamental frequency component of the pulse spectrum of the collector current to the
load. The load and its resonance transformation to the collector of the power amplifier
can be generalized by the equivalent circuit of Figure 16. The tank circuit L//C//RL in
parallel to the output impedance of the transistor should be in resonance at the
operating frequency of the transmitter.
Data Sheet
29
V 1.0, 2007-05-02