TDA7110F Datasheet, PDF (24/36 Pages) Infineon Technologies AG – 434 MHz ASK/FSK Transmitter in 10-pin Package

TDA7110F
Applications
Cv± =
1
1 _+ω2L
CL ±
If the FSK switch is closed, Cv± is equal to Cv1 (C1 in the application diagram). If the
FSK switch is open, Cv2 (C2 in the application diagram) can be calculated.
Csw:
Cv 2 = C 2 = ^{Csw ∗ Cv1 − (Cv +) ∗ (Cv1 + Csw )}
(Cv +) − Cv1
parallel capacitance of the FSK switch (3 pF incl. layout parasitics)
Remark: These calculations are only approximations. The necessary values depend
on the parasitic and thus on the layout also and must be adapted for the specific
application board.
3.5
Design Hints on the Clock Output (CLKOUT)
The CLKOUT pin is an open collector output. An external pull up resistor (RL) should be
connected between this pin and the positive supply voltage. The value of RL is
depending on the clock frequency and the load capacitance CLD (PCB board plus input
capacitance of the microcontroller). RL can be calculated to:
RL =
1
fCLKOUT *8* CLD
Table 7
Remark:
Clock Output
CL[pF]
5
10
20
fCLKOUT=847.5 kHz
RL[kOhm]
27
12
6.8
To achieve a low current consumption and a low
spurious radiation, the largest possible RL should be chosen.
Data Sheet
24
V 1.0, 2009-02-26