PEB20320 Datasheet, PDF (225/252 Pages) Infineon Technologies AG – ICs for Communications

PEB 20320
Application Hints
TCLK
TSP
TDATA
MUNICH32
PEB 20320
RDATA
RSP
RCLK
SYPXQ
XDI
SCLKX
FALC54
PEB 2254
SCLKR
RDO
SYPRQ
CLKX CLK8M FSCQ FSC
ITS07370
Figure 114
The adaption of the TSP and RSP pulses is solved by means of shifting the receive data
and transmit data in the FALC54 device appropriately. In this case the TSP and RSP
synchronization pulses are also identical. The FALC54 device contains special registers
to control the bit shift of the serial bit streams at the system interface (see FALC54 Data
Sheet). With the following register programming the bit shift selected is T = 509 for the
MUNICH32 transmit data and T = – 1 for the receive data respectively. The
programming is as follows:
XDI: XC1.XTO = 3D_H => X = 494 => T = 509
XC0.XCO = 06_H
RDO: RC1.RTO = 00_H => X = 5
RC0.RCO = 05_H
=> T = – 1
User’s Manual
225
01.2000