TDA5220 Datasheet, PDF (22/44 Pages) Infineon Technologies AG – ASK/FSK Single Conversion Receiver

confidential
TDA 5220
preliminary
Applications
4.1 Choice of LNA Threshold Voltage and Time Constant
In the following figure the internal circuitry of the LNA automatic gain control is
shown.
R1
Pins:
24
20kΩ
R2
U
th re s h old
23
RSSI (0.8 - 2.8V)
+3.1 V
OTA VCC
I
lo a d
RSSI > U_{thres hold}: I_load=4.2µA
RSSI < U_{thres hold}: I_load= -1.5µA
LNA
Gain control
voltage
4
U_C
U_c:< 2.6V : Gain high
U_c:> 2.6V : Gain low
C
U_{c max} = V_{C C} - 0.7V
U_{c min} = 1.67V
Figure 4-1 LNA Automatic Gain Control Circuitry
LNA_autom.wmf
The LNA automatic gain control circuitry consists of an operational transimped-
ance amplifier that is used to compare the received signal strength signal
(RSSI) generated by the Limiter with an externally provided threshold voltage
U_thres. As shown in the following figure the threshold voltage can have any
value between approximately 0.8 and 2.8V to provide a switching point within
the receive signal dynamic range.
This voltage U_thres is applied to the THRES pin (Pin 23) The threshold voltage
can be generated by attaching a voltage divider between the 3VOUT pin
(Pin 24) which provides a temperature stable 3V output generated from the
internal bandgap voltage and the THRES pin. If the RSSI level generated by the
Limiter is higher than U_thres, the OTA generates a positive current I_load. This
yields a voltage rise on the TAGC pin (Pin 4). Otherwise, the OTA generates a
negative current. These currents do not have the same values in order to
achieve a fast-attack and slow-release action of the AGC and are used to
charge an external capacitor which finally generates the LNA gain control volt-
age.
Wireless Components
4-2
Target Specification, October 2001