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2EDL05I06PF_16 Datasheet, PDF (21/22 Pages) Infineon Technologies AG – High voltage gate driver IC | |||
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6.2
PG-DSO-14
EiceDRIVER⢠Compact
2EDL family
Max. reflow solder temperature:
Max. wave solder temperature:
Figure 14 Package drawing
265°C acc. JEDEC
245°C acc. JEDEC
Figure 15 PCB reference layout (according to JEDEC 1s0P)
left: Reference layout
right: detail of footprint
The thermal coefficient is used to calculate the junction temperature, when the IC surface temperature is
measured. The junction temperature is
í µí±j = Ψth(j-top) â í µí±í µí± + í µí±top
Table 9
Data of reference layout
Dimensions
Material
76.2 ï´ 114.3 ï´ 1.5 mm³
FR4 (ï¬therm = 0.3 W/mK)
Metal (Copper)
70µm (ï¬therm = 388 W/mK)
Final datasheet
21
<Revision 2.6>, 01.06.2016
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