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PSB21150 Datasheet, PDF (208/272 Pages) Infineon Technologies AG – IPAC-X ISDN PC ADAPTER CIRCUIT
PSB 21150
PSF 21150
Detailed Register Description
4.4.5 TRC_CR - Control Register Transceiver C/I0 (IOM_CR.CI_CS=1)
Value after reset: 00H
7
0
TRC_CR 0
0
0
0
0
CS2-0
RD/WR (50)
Write access to this register is possible if IOM_CR.CI_CS = 0 or IOM_CR.CI_CS = 1.
Read access to this register is possible only if IOM_CR.CI_CS = 1.
CS2-0 ... Channel Select for the Transceiver C/I0 Channel
This register is used to select one of eight IOM channels to which the transceiver C/I0
channel data is related to. The reset value is determined by the MODE2-bit and the
channel select pins CH2-0 which are mapped to CS2-0.
4.4.6 BCHx_CR - Control Register B-Channel Controller Data
7
BCHx_CRDPS_D 0
EN_D EN_ EN_
BC2 BC1
0
CS2-0
RD/WR
(51,52)
Register
BCHA_CR
BCHB_CR
Register Address
51H
52H
Value after Reset
08H
81H
The registers BCHA_TSDP_BC1/2 and BCHB_TSDP_BC1/2 (see above) select the
IOM-2 timeslots for B-channel controller access. For each of the B-channel controllers
(BCHA, BCHB) two 8-bit timeslots can be selected (position and direction).
This register BCHx_CR is used to select the position (CS2-0) and direction (DPS_D) of
the 2-bit timeslot for each of the two B-channel controllers, and each of the three selected
timeslots (2 x 8-bit and 2-bit) is individually enabled/disabled (EN_BC1, EN_BC2,
EN_D).
DPS_D ... Data Port Selection for D-Channel Timeslot access
0: The B-channel controller data is output on DD.
The B-channel controller data is input from DU.
1: The B-channel controller data is output on DU.
The B-channel controller data is input from DD.
Data Sheet
208
2000-07-21