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TLE4998S8D Datasheet, PDF (20/23 Pages) Infineon Technologies AG – High Performance Programmable Dual Linear Hall Sensor
TLE4998S8D Grade1
SENT Output Definition (SAE J2716)
Table 9-1
Mapping of Temperature Value
Junction Temperature
Typ. Decimal Value from Sensor
- 55 °C
0
0 °C
55
25 °C
80
200 °C
255
1) Theoretical range of temperature values, not operating temperature range.
Note
Theoretical lower limit1)
–
–
Theoretical upper limit1)
The status nibble as defined in the SAE standard has two free bits (the LSBs or first and second bit). These bits
contain the selected magnetic range of the sensor and therefore allow the received data to be interpreted easily.
As no serial data is transferred with the IC, the remaining bits of the status nibble are not required. The MSB (fourth
bit) notifying a start of a serial transmission and the data bit (or third bit) would be kept zero. Thus, these bits are
used in a more suitable way for this sensor, as shown in Figure 9-2.
In case of startup- or supply overvoltage condition, the open-drain stage is disabled (high ohmic) and the
corresponding status bits are set. After VDD has returned to the normal operating range, this status information
will be transmitted within the first SENTtransmission.
In case of uncorrectable EEPROM failure, the open-drain stage is disabled and is kept in “switched off” state
permanently (high ohmic/ sensor defect). The fourth bit is switched to “1” for the first data package transferred after
a reset. This allows the receiver to detect low-voltage situations or EMC problems of the sensor. The third bit is
set to “1” in case of an over-voltage condition of the IC. This signals that a sensor is still functioning, but its
performance may be out of specification. It enables an early warning for high supply voltage, before the sensor
completely stops functioning (e.g. VDD > 17.5 V, see Chapter 7.1).
9.2
Unit Time Setup
The basic SENT protocol unit time granularity is defined as 3 μs. Every timing is a multiple of this basic time unit.
To achieve more flexibility, trimming of the unit time can be used to:
• Allow a calibration trim within a timing error of less than 20% clock error (as given in SAE standard)
• Allow a modification of the unit time for small speed adjustments
This enables a setup of different unit times, even if the internal RC oscillator varies by ±20%. Of course, timing
values that are too low could clash with timing requirements of the application and should therefore be avoided,
but in principle it is possible to adjust the timer unit for a more precise protocol timing.
Table 9-2
Pre-divider Setting
Parameter
Symbol
Values
Unit Note / Test Condition
Min. Typ. Max.
Register size
Prediv
4
bit
Pre-divider1)
Unit time
tUNIT
2.0
4.0 μs
ClkUNIT=8 MHz2)
1) Useable predivider range is decimal 7 to 15. Prediv < 7 is internally kept at 7. Prediv default is decimal = 11 for 3 μs nominal
unit time
2) RC oscillator frequency variation ± 20%.
The nominal unit time is calculated by:
fUNIT = (Prediv × 2 + 2) / Clk UNIT
Clk UNIT = 8 MHz ± 20 %
(9.1)
Technical Product Description
20
Revision 1.0, 2013-02-22