TLE4269_07 Datasheet, PDF (2/19 Pages) Infineon Technologies AG – 5-V Low Drop Fixed Voltage Regulator Output voltage tolerance ≤ ±2%

TLE 4269
PG-DSO-8-16
Ι1
SΙ 2
RADJ 3
D4
8Q
7 SO
6 RO
5 GND
AEP01668
Figure 1 Pin Configuration (top view)
Table 1
Pin No.
1
2
3
4
5
6
7
8
Pin Definitions and Functions (TLE 4269 G)
Symbol Function
I
Input; block to GND directly at the IC with a ceramic capacitor.
SI
Sense Input; if not needed connect to Q.
RADJ Reset Threshold Adjust; if not needed connect to GND.
D
Reset Delay; to select delay time, connect to GND via capacitor.
GND
Ground
RO
Reset Output; the open-collector output is internally linked to Q
via a 20 kΩ pull-up resistor. Keep open, if not needed.
SO
Sense Output; the open-collector output is internally linked to
the output via a 20 kΩ pull-up resistor. Keep open, if not needed.
Q
5-V Output; connect to GND with a 10 µF capacitor,
ESR < 10 Ω.
Data Sheet
2
Rev. 2.4, 2007-03-20