ISO2H823V25 Datasheet, PDF (19/82 Pages) Infineon Technologies AG – Galvanic Isolated 8 Channel High-Side Switch

4
Functional Description
ISOFACE™
ISO2H823V2.5
Functional Description
4.1
Introduction
The IC contains 2 galvanic isolated voltage domains that are independent from each other. The input interface
(µC-chip) is supplied at V_CC and the output stage (power chip) is supplied at V_BB. The different voltage domains
can be switched on at different time. The output stage is only enabled once the input stage enters a stable state.
The power chip generates out of V_BB two internal voltages V_DDIO = 3.3 V (+ 10 %) and V_CORE = 1.5 V (+ 10%)
which have to be buffered externally.
The ISOFACE ISO2H823V2.5 includes 8 high-side power switches that are controlled by means of the integrated
parallel/serial interface. The interface is 8-bit µController compatible. Furthermore a direct control mode can be
selected that allows the direct control of the outputs OUT0 … OUT7 (power chip) by means of the inputs AD0 …
AD7 (µC-chip) without any additional logic signal. The IC can replace 8 optocouplers and the 8 high-side switches
in conventional I/O-Applications as a galvanic isolation is implemented by means of the integrated coreless
transformer technology. The µController compatible interface allows a direct connection to the ports of a
microcontroller without the need for other components. Each of the 8 high-side power switches is protected against
overload, overtemperature and against overvoltage by an active zener clamp.
4.2
Microcontroller Interface
The microcontroller interface can be configured as a parallel or serial interface via the SEL pin.
4.2.1 Parallel Interface Mode
The ISO2H823V2.5 device contains a parallel interface that can be selected by pulling the SEL Pin to logic Low
state. The interface can be directly controlled by the µController output ports (see Figure 6). The output pins
AD7:AD0 are in state “Z” as long as CS=1, RD=1 and WR=1.
VCC
Figure 6 Bus Configuration for Parallel Mode
VCC
/CS
ALE
/WR
/RD
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
SEL
parallel _interface_iso2h823. vsd
Datasheet
19
Revision 2.0, 2015-02-12