TLE6368 Datasheet, PDF (16/58 Pages) Infineon Technologies AG – Multi-Voltage Processor Power Supply

TLE 6368 / SONIC
the closed window (CW) starts. Then three valid watchdog triggers are shown, no effect
on the reset line and/or error pin is observed. With the missing watchdog trigger signal
the error signal turns low immediately where the reset is asserted after another delay of
half the closed window time.
Also shown in the figure are two typical failure modes, one pretrigger and one missing
signal. In both cases the error signal will go low immediately the failure is detected with
the reset following after the half closed window time.
2.10 Overtemperature Protection
At a chip temperature of more than 150° an error and temperature flag is set and can be
read through the SPI. The device is switched off if the device reaches the
overtemperature threshold of 170°C. The overtemperature shutdown has a hysteresis to
avoid thermal pumping.
2.11 Power Down Mode
The TLE 6368 G1 / SONIC is started by a static high signal at the wake input or a high
pulse with a minimum of 50µs duration at the Wake input (pin 34). In order to avoid
instabilities of the device voltages applied to the Wake pin (pin 34) have to have a certain
slope, i.e. 1V/3µs. Voltages in the range between the turn on and turn off thresholds for
a few 100µs must be avoided!
By SPI command (“Sleep”-bit, D8, equals zero) all voltage regulators including the
switching regulator except the standby regulator can be turned off completely only if the
wake input is low. In the case the Wake input is permanently connected to battery the
device cannot be turned off by SPI command, it will always turn on again.
For stable “on” operation of the device the “Sleep”-bit, D8 has to be set to high at each
SPI cycle!
When powering the device again after power down the status of the SPI controlled
devices (e.g. trackers, watchdog etc.) depends on the output voltage on Q_LDO1. Did
the voltage at Q_LDO1 decrease below 3.3V the default status (given in the next section)
is set otherwise the last SPI command defines the status.
2.12 Serial Peripheral Interface
A standard 16 bit SPI is available for control and diagnostics. It is capable to operate in
a daisy chain. It can be written or read by a 16 bit SPI interface as well as by an 8 bit SPI
interface.
The 16-bit control word (write bit assignment, see Figure 8) is read in via the data input
DI, synchronous to the clock input CLK supplied by the µC beginning with the LSB D0.
The diagnosis word appears in the same way synchronously at the data output DO (read
bit assignment, see figure 9), so with the first bit shifted on the DI line the first bit appears
on the DO line.
Data Sheet, Rev. 1.32
16
2004-10-15