C164SV Datasheet, PDF (16/65 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller

C164SV
Preliminary
Memory Organization
The memory space of the C164SV is configured in a Von Neumann architecture which
means that code memory, data memory, registers and I/O ports are organized within the
same linear address space which includes 16 Mbytes. The entire memory space can be
accessed bytewise or wordwise. Particular portions of the on-chip memory have
additionally been made directly bitaddressable.
The C164SV incorporates 16 Kbytes of on-chip mask-programmable ROM (not in the
ROM-less derivative, of course) for code or constant data. The on-chip ROM can be
mapped either to segment 0 or segment 1.
1 Kbyte of on-chip Internal RAM (IRAM) is provided as a storage for user defined
variables, for the system stack, general purpose register banks and even for code. A
register bank can consist of up to 16 wordwide (R0 to R15) and/or bytewide (RL0, RH0,
…, RL7, RH7) so-called General Purpose Registers (GPRs).
1024 bytes (2 × 512 bytes) of the address space are reserved for the Special Function
Register areas (SFR space and ESFR space). SFRs are wordwide registers which are
used for controlling and monitoring functions of the different on-chip units. Unused SFR
addresses are reserved for future members of the C166 Family.
In order to meet the needs of designs where more memory is required than is provided
on chip, up to 64 Kbytes of external RAM and/or ROM can be connected to the
microcontroller.
Data Sheet
12
V1.0, 2003-04