TDA5103A Datasheet, PDF (15/29 Pages) Infineon Technologies AG – ASK Transmitter 345 MHz

TDA 5103A
preliminary
Functional Description
3.4.4 Low Power Detect
The supply voltage is sensed by a low power detector. When the supply voltage
drops below 2.15 V, the output LPD (pin 10) switches to the low-state. To min-
imize the external component count, an internal pull-up current of 40 µA gives
the output a high-state at supply voltages above 2.15 V.
The output LPD (pin 10) can either be connected to DATA (pin 5) to switch off
the PA as soon as the supply voltage drops below 2.15 V or it can be used to
inform a micro-controller to stop the transmission after the current data packet.
3.4.5 Power Modes
The IC provides three power modes, the POWER DOWN MODE, the PLL
ENABLE MODE and the TRANSMIT MODE.
3.4.5.1 Power Down Mode
In the POWER DOWN MODE the complete chip is switched off.
The current consumption is less than 100nA.
3.4.5.2 PLL Enable Mode
In the PLL ENABLE MODE the PLL is switched on but the power amplifier is
turned off to avoid undesired power radiation during the time the PLL needs to
settle. The turn on time of the PLL is determined mainly by the turn on time of
the crystal oscillator and is typically less than 1 msec, depending on the crystal.
The current consumption is typically 3.5 mA.
3.4.5.3 Transmit Mode
In the TRANSMIT MODE the PLL is switched on and the power amplifier is
turned on too.
The current consumption of the IC is typically 7 mA when using a proper trans-
forming network at PAOUT, see Figure 4-1.
3.4.5.4 Power mode control
The bias circuitry is powered up via a voltage V > 1.5 V at the pin PDWN (pin 1).
When the bias circuitry is powered up, the pin DATA is pulled up internally.
Forcing the voltage at the pin DATA low overrides the internally set state.
The principle schematic of the power mode control circuitry is shown in
Figure 3-5.
Wireless Components
3-8
Specification, March 2001