TLE6208-3G Datasheet, PDF (14/21 Pages) Infineon Technologies AG – Triple-Half-Bridge

TLE 6208-3 G
2.3
Electrical Characteristics (cont’d)
8 V < V_S < 40 V; 4.75 V < V_CC < 5.25 V; INH = High; all outputs open; – 40 °C < T_j < 150 °C;
unless otherwise specified
Parameter
Symbol Limit Values Unit Test Condition
min. typ. max.
Logic Output DO
H-output voltage level
V_DOH
V_CC V_CC –
– 1.0 – 0.7
V
I_DOH = 1 mA
L-output voltage level
Tri-state leakage current
V_DOL
I_DOLK
Tri-state input capacitance C_DO
–
0.2 0.4 V I_DOL = – 1.6 mA
– 10 0
10
µA V_CSN = V_CC
0 V < V_DO < V_CC
–
10
15
pF V_CSN = V_CC
0 V < V_CC <
5.25 V
Note: Capacitances are guaranteed by design.
Data Input Timing
Clock period
Clock high time
Clock low time
Clock low before CSN low
CSN setup time
CLK setup time
Clock low after CSN high
DI setup time
DI hold time
Input signal rise time
at pin DI, CLK and CSN
Input signal fall time
at pin DI, CLK and CSN
t_pCLK
t_CLKH
t_CLKL
t_bef
t_lead
t_lag
t_beh
t_DISU
t_DIHO
t_rIN
t_fIN
1000 –
500 –
500 –
500 –
500 –
500 –
500 –
250 –
250 –
–
–
–
–
– ns –
– ns –
– ns –
– ns –
– ns –
– ns –
– ns –
– ns –
– ns –
200 ns –
200 ns –
Data Sheet
14
2001-05-10