TLE7209-3R Datasheet, PDF (13/32 Pages) Infineon Technologies AG – Short circuit protection

TLE 7209-3R
Circuit Description
2.4.2.3 SPI-Communication
The 16 input bits consist of the SPI-instruction byte and a second, unused byte. The 16
output bits consist of the verification-byte and the data-byte (see also Figure 8). The
definition of these bytes is given in the subsequent sections.
CSN
SCK
SDI
SDO
7654321076543210
MSB
SPI Instruction
LSB
not used
MSB
Verification byte
LSB MSB
data-byte
LSB
Figure 8 SPI communication
2.4.2.4 SPI instruction
The uppermost 2 bit of the instruction byte contain the chip-address. The chip-address
of the TLE7209-3R is 00. During read-access, the output data according to the register
requested in the instruction byte are applied to SDO within the same SPI frame. That
means, the output data corresponding to an instruction byte sent during one SPI frame
are transmitted to SDO during the same SPI frame.
Table 3
MSB
7
0
Table 4
Bit
7,6
5-1
0
SPI Instruction Format
6
5
4
3
2
1
0
INSTR4 INSTR3 INSTR2 INSTR1 INSTR0
SPI instruction Description
Name
Description
CPAD1,0
Chip Address (has to be ‘0’, ‘0’)
INSTR (4-0)
SPI instruction (encoding)
INSW
Even parity
0
INSW
Data Sheet
13
Rev. 1.0, 2014-02-03