ICE3DS01L_05 Datasheet, PDF (13/27 Pages) Infineon Technologies AG – Off-Line SMPS Current Mode Controller with integrated 500V Startup Cell

F3
ICE3DS01L/LG
Functional Description
5.4V and V_FB is still below 1.32V Active Burst Mode is
entered. Once Active Burst Mode is entered gate G4 is
blocked to ensure that the blanking window is only active
before entering the Active Burst Mode.
3.6.2
Active Burst Mode
The controller provides Active Burst Mode for low load
conditions at V_OUT. Active Burst Mode increases
significantly the efficiency at light load conditions while
supporting a low ripple on V_OUT and fast response on load
jumps. During Active Burst Mode which is controlled only
by the FB signal the IC is always active and can therefore
immediately response on fast changes at the FB signal. The
Startup Cell is kept switched off to avoid increased power
losses for the self supply.
SoftS
6.5V
5kΩ
R_SoftS
4.4V
&
S1
G4
C3
5.4V
Internal Bias
Current
Limiting
&
G10
4.8V
C4
FB
C5
4.0V
C6
1.32V
Control Unit
Active
Burst
&
Mode
G6
&
G11
starting from the clamped voltage level at 4.4V in normal
operating mode. The gate G11 is blocked before entering
Active Burst Mode. If V_SoftS exceeds 5.4V the comparator
C3 releases the gate G6 to enter the Active Burst Mode. The
time window that is generated by combining the FB and
SoftS signals with gate G6 avoids a sudden entering of the
Active Burst Mode due to large load jumps. This time
window can be adjusted by the external capacitor C_SoftS.
After entering Active Burst Mode a burst flag is set which
blocks the gate G4 and the internal bias is switched off in
order to reduce the current consumption of the IC down to ca.
1.1mA. In this Off State Phase the IC is no longer self
supplied so that therefore C_VCC has to provide the VCC
current (see Figure 17). Furthermore gate G11 is then
released to start the next burst cycle once 1.32V is again
exceeded.
It has to be ensured by the application that the VCC remains
above the Undervoltage Lockout Level of 8.5V to avoid that
the Startup Cell is accidentally switched on. Otherwise
power losses are significantly increased. The minimum VCC
level during Active Burst Mode is depending on the load
conditions and the application. The lowest VCC level is
reached at no load conditions at V_OUT.
3.6.2.2 Working in Active Burst Mode
After entering the Active Burst Mode the FB voltage rises as
V_OUT starts to decrease due to the inactive PWM section.
Comparator C5 observes the FB signal if the voltage level
4V is exceeded. In that case the internal circuit is again
activated by the internal Bias to start with switching. As now
in Active Burst Mode the gate G10 is released the current
limit is only 0.257V to reduce the conduction losses and to
avoid audible noise. If the load at V_OUT is still below the
starting level for the Active Burst Mode the FB signal
decreases down to 1.32V. At this level C6 deactivates again
the internal circuit by switching off the internal Bias. The
gate G11 is released as after entering Active Burst Mode the
burst flag is set. If working in Active Burst Mode the FB
voltage is changing like a saw tooth between 1.32V and 4V
(see figure 17).
3.6.2.3 Leaving Active Burst Mode
The FB voltage immediately increases if there is a high load
jump. This is observed by comparator C4. As the current
limit is ca. 26% during Active Burst Mode a certain load
jump is needed that FB can exceed 4.8V. At this time C4
resets the Active Burst Mode which also blocks C12 by the
Figure 16 Active Burst Mode
The Active Burst Mode is located in the Control Unit. Figure
16 shows the related components.
3.6.2.1 Entering Active Burst Mode
The FB signal is always observed by the comparator C6 if
the voltage level falls below 1.32V. In that case the switch S1
is released which allows the capacitor C_SoftS to be charged
Version 2.1
13
15 Nov 2005