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TLE6284G Datasheet, PDF (10/15 Pages) Infineon Technologies AG – H-Bridge Driver IC
Data Sheet TLE6284G
Operation at extreme duty cycle:
The integrated charge pump allows an operation at 100% duty cycle. The charge pump is
strong enough to replace leakage currents during “on”-phase of the highside switch. The
gate charge for fast switching of the highside switches is supplied by the bootstrap capaci-
tors. This means, that the bootstrap capacitor needs a minimum charging time of about 1ms,
if the highside switch is operated in PWM mode (e.g. with 20kHz a maximum duty cycle of
96% can be reached). The exact value for the upper limit is given by the RC time formed by
the impedance of the internal bootstrap diode and the capacitor formed by the external Mos-
fet (CMosfet=QGate / VGS). The size of the bootstrap capacitor has to be adapted to the external
MOSFET the driver IC has to drive. Usually the bootstrap capacitor is about 10-20 times big-
ger then CMosfet. External components at the Vs Pin have to be considered, too.
The charge pump is active when the highside switch is “ON” and the voltage level at the SHx
is higher than 4V. Only under these conditions the bootstrap capacitor is charged by the
charge pump.
Estimation of power loss within the Driver IC
The power loss within the Driver IC is strongly dependent on the use of the driver and the
external components. Nevertheless a rough estimation of the worst case power loss is pos-
sible. Worst case calculation is:
PLoss = (Qgate*n*const* fPWM + IVS(open)/20kHz)* VVs - PRGate
With:
PLoss = Power loss within the Driver IC
fPWM = Switching freqency
Qgate = Total gate charge of used MOSFETs at 10V VGS
n = Number of switched MOSFETs
const = Constant considering some leakage current in the driver (about 1.2)
IVS(open) = Current consumption of driver without connected Mosfets during switching
VVS = Voltage at Vs
PRGate = Power dissipation in the external gate resistors
This value can be reduced dramatically by usage of external gate resistors.
Estimated Power Loss PLOSS within the Driver IC
for different supply voltages Vs
at QG = 100nC @ VGS = 10V
0,8
0,7
0,6
Vs = 8V
0,5
Vs = 14V
0,4
Vs = 18V
0,3
0,2
0,1
0
0
10 20 30 40 50 60
PWM Frequency (kHz)
0,8
0,7
0,6
0,5
0,4
0,3
0,2
0,1
0
0
Estimated Power Loss PLOSS within the Driver IC
for different gate charges QG
at supply voltage Vs = 14V
QG = 50nC
QG = 100nC
QG = 200nC
10
20
30
40
50
60
PWM Frequency (kHz)
Conditions :
Junction temperature Tj = 25oC
Number of switched MOSFET n = 2
Power dissipation in the external gate resistors PRGate = 0,2*PLoss
10
2006-01-30