ICE3AS02_05 Datasheet, PDF (10/22 Pages) Infineon Technologies AG – Off-Line SMPS Current Mode Controller with integrated 500V Startup Cell

3.4
PWM Section
0.72
Oscillator
Duty
Cycle
max
Clock
F3
ICE3AS02 / ICE3AS02G / ICE3BS02 / ICE3BS02G
Functional Description
PWM Section
PWM-Latch
1
VCC
Z1
Gate
Soft Start
Comparator
PWM
Comparator
Current
Limiting
FF1
1S
G8 ^{R Q}
Gate
Driver
&
G9
Figure 8 Gate Driver
The driver-stage is optimized to minimize EMI and to
provide high circuit efficiency. This is done by reducing the
switch on slope when exceeding the external Power Switch
threshold. This is achieved by a slope control of the rising
edge at the driver’s output (see Figure 9).
Gate
V_Gate
ca. t = 130ns
Figure 7
PWM Section
3.4.1
Oscillator
The oscillator generates a fixed frequency. The switching
frequency for ICE3AS02/G is f_OSC = 100kHz and for
ICE3BS02/G f_OSC = 67kHz. A resistor, a capacitor and a
current source and current sink which determine the
frequency are integrated. The charging and discharging
current of the implemented oscillator capacitor are internally
trimmed, in order to achieve a very accurate switching
frequency. The ratio of controlled charge to discharge
current is adjusted to reach a maximum duty cycle limitation
of D_max=0.72.
3.4.2
PWM-Latch FF1
The oscillator clock output provides a set pulse to the PWM-
Latch when initiating the external Power Switch conduction.
After setting the PWM-Latch can be reset by the PWM
comparator, the Soft Start comparator or the Current-Limit
comparator. In case of resetting, the driver is shut down
immediately.
C_Load = 1nF
5V
t
Figure 9 Gate Rising Slope
Thus the leading switch on spike is minimized. When the
external Power Switch is switched off, the falling shape of
the driver is slowed down when reaching 2V to prevent an
overshoot below ground. Furthermore the driver circuit is
designed to eliminate cross conduction of the output stage.
During powerup when VCC is below the undervoltage
lockout threshold V_VCCoff, the output of the Gate Driver is
low to disable power transfer to the secondary side.
3.4.3
Gate Driver
The Gate Driver is a fast totem pole gate drive which is
designed to avoid cross conduction currents and which is
equipped with a zener diode Z1 (see Figure 8) in order to
improve the control of the Gate attached power transistors as
well as to protect them against undesirable gate
overvoltages.
Version 1.2
10
02 Sep 2005