ICE1HS01G-1 Datasheet, PDF (10/19 Pages) Infineon Technologies AG – Half-Bridge Resonant Controller

Half-Bridge Resonant Controller
ICE1HS01G-1
Functional description
current source I_hys connected between VINS and
Ground, an adjustable hysteresis between the on and
off input voltage can be created as
V_HYS = R_INS1 × I_hys
[4]
The mains input voltage is divided by R_INS1 and R_INS2 as
shown in the typical application circuit. A current source
I_hys is connected from VINS pin to ground in the IC. If
the on and off threshold for mains voltage is V_mainon and
V_mainoff, the resistors can be decided as
If C_FB is 10nF, the time is about 439us. After V_FB
reaches V_FBH, an internal counter will increase by 1 and
the capacitor is discharged to 0.5V by Q_FB again. The
charging and discharging process of C_FB will be
repeated for N_{OLP_E} times if the fault condition still exist.
After the last time of N_{OLP_E} the FB voltage is pulled
down to zero, IC will stop the switch when FB voltage
rises to V_FBH again. This is called over load/open loop
protection. During the charging and discharging period,
the IC will operate with frequency determined by I_{chg_min}
and I_CS.
R_INS1 = ^V-----m---^a---ⁱ-ⁿ--^o---ⁿ-I--–_h--_y---V_s----^m----^a--ⁱ-ⁿ--^o---^f-^f
5V
[5]
4.5V
R_INS2 = R_INS1 × _{V-----m---a---i-n-V-o---f-}^If_-^N_--–-^S_---^O_-V--^N_{--I--N---S---O---N-}
[6]
3.7 Over load protection
In case of open control loop or output over load fault,
the FB voltage will increase to its maximum level. If FB
voltage is higher than V_FBH and this condition last
longer than a fixed blanking time of T_OLP (20ms), the IC
will start the extended blanking timer. The extended
blanking timer is realized by charging and discharging
the filter capacitor C_FB via the pull up resistor R_FB and
Q_FB. The circuit for extended blanking timer is shown in
Figure 11.
Vdd
RFB
FB
Iref
I
IFB
1.0V
CFB1
4.5V
TOLP
24ms
ICE1 HS01G
SQ
R
QFB
0.5V
0.8V
EnA
CFB4
CFB2
EnA
CFB3
EnA
0.5V
SQ
R
TOLP_R
1.2 ms
UP Reset
CLK ^OLP
R Q _{Gate_off}
EnA
S
CFB5
AR
SQ
R
AR_R
Figure 11 Circuit connected to FB pin
The FB voltage waveform during a OLP period is
shown in Figure 12. After FB voltage has been higher
than V_FBH for the fixed blanking time t1 shown in Figure
11, IC will use internal switch Q_FB to discharge V_FB to
V_FBL. After the switch Q_FB is released, C_FB will be
charged up by Vdd through R_FB. The time needed for
C_FB being charged to V_FBH can be calculated as
0.5V
t1
Time
t2
t3
Figure 12 FB voltage waveform during over load
protection
If the converter returns to normal operation during the
extended blanking time period, FB voltage can not
reach V_FBH again. Therefore, after FB voltage is
discharged to zero voltage, if it can not reach V_FBH
within T_{OLP_R}, IC will reset all the fault timer to zero and
return to normal operation.
After IC enters into OLP, both switches will be stopped.
However, the IC remains active and will try to start with
soft start after an adjustable period. This period is
realized by charging and discharging the capacitor C_INS
connected to VINS pin for N_{OLP_R} times. The time is
therefore determined by the capacitor C_INS and resistor
R_INS1 and R_INS2. The circuit implementation of the
adjustable off time is shown in Figure 13 and Figure 14
shows the voltage waveform of VINS in this case.
As shown in Figure 14, the C_INS is discharged to V_{INS_L}
when IC enters into OLP at time t1. After that, an
internal constant current source I_INST is turned on to
charge C_INS. Once the voltage on VINS is charged to
V_{INS_H}, the current source will be turned off and C_INS is
discharged by another switch Q3 to V_{INS_L} again. The
charging and discharging of C_INS is thought as one
cycle. The cycle time is also influenced by the bus
t_chg
=
–
ln
æ
è
V-V----_{dd--d-d---––----V-V----FF---BB--H-L-øö}
× R_FB × C_FB
[7]
Version 2.0
10
02 July 2011