KSZ8895 Datasheet, PDF (1/115 Pages) Infineon Technologies AG – Integrated 5-Port 10/100 Managed Ethernet Switch with MII/RMII interface

KSZ8895MQ/RQ/FMQ
Integrated 5-Port 10/100 Managed Ethernet
Switch with MII/RMII interface
Rev. 1.2
General Description
The KSZ8895MQ/RQ/FMQ is a highly-integrated Layer
2 managed five-port switch with optimized design and
plentiful features. It is designed for cost-sensitive
10/100Mbps five-port switch systems with lowest power
consumption, on-chip termination and internal core
power controller. These features will save more system
cost. It supports high-performance memory bandwidth,
shared memory based switch fabric with non-blocking
configuration. It also provides an extensive feature set
such as power management, programmable rate limit
and priority ratio, tag/port-based VLAN, packets filtering,
four queues QoS prioritization, management interfaces
and MIB counters. KSZ8895 family provides multiple
CPU data interfaces to effectively address both current
and emerging fast Ethernet applications when port 5 is
configured to separate MAC5 with SW5-MII/RMII and
PHY5 with P5-MII/RMII interfaces.
The configurations provided by the KSZ8895 family
enables the flexibility to meet different requirements:
• KSZ8895MQ: Five 10/100Base-T/TX transceivers,
one SW5-MII and one P5-MII interface
• KSZ8895RQ: Five 10/100Base-T/TX transceivers,
one SW5-RMII and one P5-RMII interface
• KSZ8895FMQ: Three 10/100Base-T/TX transceiver
on Ports 1, 2, 5 and two 100Base-FX transceivers
on Ports 3, 4, one SW5-MII and one P5-MII
interface
All registers of MACs and PHYs units can be managed
by the SPI or the SMI interface. MIIM registers can be
accessed through the MDC/MDIO interface. EEPROM
can set all control registers for the unmanaged mode.
Functional Diagram
Note: SW5 indicates the MAC5 of the switch side, P5 indicates the PHY5 of the Port 5.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel [phone] • fax + 1 [phone] • http://www.micrel.com
January 2011
M9999-012011-1.2