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IPB037N06N3G Datasheet, PDF (1/11 Pages) Infineon Technologies AG – OptiMOS™3 Power-Transistor Features for sync. rectification, drives and dc/dc SMPS | |||
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Type
OptiMOSâ¢3 Power-Transistor
Features
⢠for sync. rectification, drives and dc/dc SMPS
⢠Excellent gate charge x R DS(on) product (FOM)
⢠Very low on-resistance R DS(on)
⢠N-channel, normal level
⢠Avalanche rated
⢠Qualified according to JEDEC1) for target applications
⢠Pb-free plating; RoHS compliant
⢠Halogen-free according to IEC61249-2-21
Type
IPB037N06N3 G IPI040N06N3 G
IPB037N06N3 G IPI040N06N3 G
Product Summary
IPP040N06N3 G
V DS
R DS(on),max (SMD)
ID
60 V
3.7 mΩ
90 A
previous engineering
sample codes:
IPP04xN06N
IPI04xN06N
IPB04xN06N
IPP040N06N3 G
Package
Marking
PG-TO263-3
037N06N
PG-TO262-3
040N06N
PG-TO220-3
040N06N
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol Conditions
Value
Unit
Continuous drain current
ID
T C=25 °C2)
90
A
T C=100 °C
90
Pulsed drain current3)
I D,pulse T C=25 °C
360
Avalanche energy, single pulse
E AS
I D=90 A, R GS=25 Ω
165
mJ
Gate source voltage
V GS
±20
V
Power dissipation
P tot
T C=25 °C
188
W
Operating and storage temperature T j, T stg
-55 ... 175
°C
IEC climatic category; DIN IEC 68-1
55/175/56
1)J-STD20 and JESD22
2) Current is limited by bondwire; with an R thJC=0.8 K/W the chip is able to carry 162 A.
3) See figure 3
4) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
Rev. 1.03
page 1
2009-12-17
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