IMP1232LP Datasheet, PDF (1/7 Pages) IMP, Inc – 5V μP Power Suppl er Supply Monit y Monitor and or and Reset Cir eset Circuit

IMP1232LP/LPS
POWER MANAGEMENT
5V µP Power Supply Monitor and
Reset Circuit
– Selectable Trip-Point Tolerance
and Watchdog Period
– Push-Button Reset
The IMP1232LP/LPS microprocessor supervisor can halt and restart a
“hung-up” or “stalled” microprocessor, restart a microprocessor after a
power failure, and debounce and interface a manual push-button micro-
processor reset switch. The low-power supervisors feature 40% lower
supply current than the pin compatible Dallas Semiconductor
DS1232LP/LPS.
Precision temperature compensated reference and comparator circuits
monitor the 5V, V_CC input voltage. During power-up or when the V_CC
power supply falls outside selectable tolerance limits, both the RESET
and RESET become active. When V_CC rises above the threshold voltage,
the reset signals remain active for an additional 250ms minimum,
allowing the power supply and system microprocessor to stabilize. The
trip point tolerance signal, TOL, selects the trip level tolerance to be
either 5- or 10-percent.
Each device has both a push-pull, active HIGH reset output and an open
drain, active LOW reset output.
A debounced manual reset input activates the reset outputs for a mini-
mum period of 250ms.
Also included is a watchdog timer to stop and restart a microprocessor
that is “hung-up”. Three watchdog time-out periods are selectable:
Key Features
x Pin compatible with the Dallas Semiconductor
DS1232LP/1232LPS
— 40% lower supply current
x 5V supply monitor
x Selectable watchdog period
x Debounce manual push-button reset input
x Precision temperature-compensated voltage
reference and comparator
x Power-up, power-down and brownout detection
x 250ms reset time
x Active LOW open-drain reset and active HIGH
push-pull output
x Selectable trip point tolerance: 5% or 10%
x Low-cost, surface mount packages: 8/16-pin
SO, 8-pin DIP and 8-pin MicroSO
x Wide operating temperature – 40°C to +85°C
(N/EPA suffixed devices)
150ms, 610ms and 1,200ms. If the ST input is not strobed
LOW before the time-out period expires, a reset is issued.
Devices are available in 8-pin DIP, 8/16-pin SO and com-
pact 8-pin MicroSO packages.
Block Diagram
V_CC
TOL
8 (15)
3 (6)
5%/10% Tolerance
Selection
IMP1232LP/LPS
(16-Pin Package)
+
Reference
V_CC
–
PBRST
1 (2)
2 (4)
TD
7 (13)
ST
© 1999 IMP, Inc.
40kΩ
Push Button
Debounce
Watchdog
Timebase Selection
Watchdog
Transition Detector
Reset &
Watchdog Timer
4 (8)
GND
408-432-9100/www.impweb.com
6 (11)
RESET
5 (9)
RESET
1232_03.eps
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