IN74HC597A Datasheet, PDF (4/10 Pages) IK Semicon Co., Ltd – 8-Bit Serial or Parallel-Input/ Serial-Output Shift Register with Input Latch High-Performance Silicon-Gate CMOS

IN74HC597A
AC ELECTRICAL CHARACTERISTICS (C_L=50pF,Input t_r=t_f=6.0 ns)
V_CC
Guaranteed Limit
Symbol
Parameter
V 25 °C ≤85°C ≤125°C Unit
to
-55°C
f_max Minimum Clock Frequency (50% Duty Cycle)
2.0 6.0
4.8
4.0 MHz
(Figures 2 and 8)
4.5 30
24
20
6.0 35
28
24
t_PLH, t_PHL Maximum Propagation Delay, Latch Clock to Q_H 2.0 210
265
315
ns
(Figures 1 and 8)
4.5 42
53
63
6.0 36
45
54
t_PLH, t_PHL Maximum Propagation Delay , Shift Clock to Q_H 2.0 175
220
265
ns
(Figures 2 and 8)
4.5 35
44
53
6.0 30
37
45
t_PHL Maximum Propagation Delay , Reset to Q_H
(Figures 3 and 8)
2.0 175
220
265
ns
4.5 35
44
53
6.0 30
37
45
t_PLH, t_PHL Maximum Propagation Delay, Serial Shift/
Parallel Load to Q_H (Figures 4 and 8)
2.0 175
220
265
ns
4.5 35
44
53
6.0 30
37
45
t_TLH, t_THL Maximum Output Transition Time, Any Output
2.0
75
(Figures 1 and 8)
4.5 15
6.0 13
95
110
ns
19
22
16
19
C_IN Maximum Input Capacitance
-
10
10
10
pF
Power Dissipation Capacitance (Per Package)
C_PD Used to determine the no-load dynamic power
consumption:
P_D=C_PDV_CC2f+I_CCV_CC
Typical @25°C,V_CC=5.0 V
50
pF
Rev. 00