IN74HC299A Datasheet, PDF (4/9 Pages) IK Semicon Co., Ltd – 8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Performance Silicon-Gate CMOS

IN74HC299A
AC ELECTRICAL CHARACTERISTICS(C_L=50pF,Input t_r=t_f=6.0 ns)
V_CC
Guaranteed Limit
Symbol
Parameter
V 25 °C ≤85°C ≤125°C Unit
to
-55°C
f_max Maximum Clock Frequency (50% Duty Cycle)
2.0 5.0
4.0
3.4 MHz
(Figures 1 and 5)
4.5 25
20
17
6.0 29
24
20
t_PLH, t_PHL Maximum Propagation Delay, Clock to Q_A’ or
2.0 170
215
255
ns
Q_H’ (Figures 1 and 5)
4.5 34
43
51
6.0 29
37
43
t_PLH, t_PHL Maximum Propagation Delay, Clock to Q_A thru 2.0 160
200
240
ns
Q_H (Figures 1 and 5)
4.5 32
40
48
6.0 27
34
41
t_PHL Maximum Propagation Delay, Reset to Q_A’ or
Q_H’ (Figures 2 and 5)
2.0 175
220
265
ns
4.5 35
44
53
6.0 30
37
45
t_PHL Maximum Propagation Delay, Reset to Q_A thru
2.0 190
240
285
ns
Q_H (Figures 2 and 5)
4.5 38
48
57
6.0 32
41
48
t_PLZ, t_PHZ Maximum Propagation Delay , OE1, OE2, S1, or 2.0 150
190
225
ns
S2 to Q_A thru Q_H (Figures 3 and 6)
4.5 30
38
45
6.0 26
33
38
t_PZL, t_PZH Maximum Propagation Delay , OE1, OE2, S1, or 2.0 150
190
225
ns
S2 to Q_A thru Q_H (Figures 3 and 6)
4.5 30
38
45
6.0 26
33
38
t_TLH, t_THL Maximum Output Transition Time, Q_A thru Q_H
2.0
60
75
90
ns
(Figures 1 and 5)
4.5 12
15
18
6.0 10
13
15
t_TLH, t_THL Maximum Output Transition Time, Q_A’ thru Q_H’ 2.0
75
(Figures 1 and 5)
4.5 15
6.0 13
95
110
ns
19
22
16
19
C_IN Maximum Input Capacitance)
-
10
10
10
pF
C_OUT
Maximum Three-State I/O Capacitance
(I/O in High-Impedance State), Q_A thru Q_H
-
15
15
15
pF
Power Dissipation Capacitance (Per Package),
Output Enable
C_PD Used to determine the no-load dynamic power
consumption:
P_D=C_PDV_CC2f+I_CCV_CC
Typical @25°C,V_CC=5.0 V
240
pF
Rev. 00