IN75232 Datasheet, PDF (1/7 Pages) Integral Corp. – EIA-232-D INTERFACE 1 CHIP IC

TECHNICAL DATA
EIA-232-D INTERFACE 1 CHIP IC
IN75232
Description
The IN75232N, IN75232D, IN75232TDS are monolithic
device containing 3 independent drives and 5 receivers. These
are designed to interface between date terminal equipment
and date communication equipment as designed by EIA-232-
D.
Features
• Meets standard EIA-232-D (Revision of RS-232-C)
• Designed to Support Data Rate up to 120kbps
• Drivers
- Current Limited Output
10 mA Typical
- Power-off Output Impedance
300 Ω Min
- Slew Rate Control by Load Capacitor
- Flexible Supply Voltage Range
- Input Compatible with Most TTL and DTL Circuits
• Receivers
- Input Resistance
3 kΩ to 7 kΩ
- Input Signal Range
± 30 V
- Built-in Input Hysteresis (Double Threshold)
• The transmitter outputs and receiver inputs are
protected to ±15kV Air ESD.
Block D iagram
V _CC+ 1
RA1 2
RA2 3
RA3 4
DY1 5
DY2 6
RA4 7
DY3 8
RA5 9
V _CC- 10
20 V CC
19 RY1
18 RY2
17 RY3
16 D A1
15 D A2
14 RY4
13 D A3
12 RY5
11 GND
IN75232^{I L}N⁷,⁵I²N³7²5^N2^,32^{I L}D⁷,⁵I²N³7²5^D232TDS
Pin Description
Name
V_CC+
DA1
DA2
DA3
V_CC
RA1
RA2
RA3
RA4
RA5
Pin No
1
16
15
13
20
2
3
4
7
9
Function
Driver Section Supply +
Driver Input
Receiver Section Supply
Receiver Input
Name
V_CC-
DY1
DY2
DY3
GND
RY1
RY2
RY3
RY4
RY5
Pin No
10
5
6
8
11
19
18
17
14
12
Function
Driver Section Supply -
Driver Output
Ground
Receiver Output
Rev. 01