8SLVP1208 Datasheet, PDF (9/23 Pages) Integrated Device Technology – LVCMOS interface levels for the control input

8SLVP1208 DATA SHEET
Parameter Measurement Information, continued
nPCLK0
PCLK0
nPCLK1
PCLK1
nQ[0:7]
Q[0:7]
Input Skew
t_PD2
t_PD1
tsk(i)
tsk(i) = t_PD1 - t_PD2
Spectrum of Output Signal Q
A0
MUX selects active
input clock signal
MUX_{_ISOL} = A0 – A1
A1
MUX selects static input
MUX Isolation
(fundamental)
Frequency
nPCLK[0:1]
PCLK[0:1]
nQ[0:7]
Q[0:7]
t_PD
Propagation Delay
nQ[0:7]
Q[0:7]
Output Rise/Fall Time
REVISION 1 08/28/14
9
LOW PHASE NOISE, 1-TO-8, 3.3V, 2.5V LVPECL OUTPUT
FANOUT BUFFER