8V43FS92432 Datasheet, PDF (8/27 Pages) Integrated Device Technology – 1360MHz Dual Output LVPECL Clock Synthesizer

8V43FS92432 DATA SHEET
Table 7. AC Characteristics, V_CC = 3.3 V ± 5%, GND = 0V, T_J = –40°C to +85°C)^{1 2}
Symbol Parameter
Condition
Minimum
f_XTAL
f_REF
f_VCO
Crystal Interface Frequency Range
FREF_EXT
Reference Frequency Range
VCO Frequency Range³
N = ÷2
15
15
1360
680
N = ÷4
340
f_OUT
Output Frequency⁴
N = ÷8
170
N = ÷16
85
N = ÷32
42.5
f_SCL
t_P,MIN
DC
Serial Interface (I²C) Clock Frequency
Minimum Pulse Width (nPLOAD)
Output Duty Cycle⁵
N = ÷64
21.25
0
50
45
t_SK(O)
t_r, t_f
t_r, t_f
t_{P_EN}
Output-to-Output Skew⁵
Output Rise/Fall Time (QA, QB)⁵
Output Rise/Fall Time (SDA)
Output Enable Time 
(nCLK_STOP[A:B] to QA, QB)
NB = 0 (f_QA = f_QB)
NB = 1 (f_QA = 2 · f_QB)
20% to 80%
C_L = 400pF
T_Qx = Output Period
0.05
t_{P_DIS}
Output Disable Time
(nCLK_STOP[A:B] to QA, QB)
T_Qx = Output Period
N = ÷2
N = ÷4
NB = 0 
(F_QA = F_QB)
N = ÷8
N = ÷16
N = ÷32
t_JIT(CC)
Cycle-to-Cycle
Jitter (RMS 1)⁶
N = ÷64
N = ÷2
N = ÷4
NB = 1 
(F_QA = 2 * F_QB)
N = ÷8
N = ÷16
N = ÷32
N = ÷64
N = ÷128, QB only
Typical
16
50
3.0 · T_Qx
3.0 · T_Qx
Maximum
20
20
2720
1360
680
340
170
85
42.5
0.4
55
38
96
0.3
250
Unit
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
ns
%
ps
ps
ns
ns
ns
ns
27
ps
23
ps
21
ps
28
ps
32
ps
42
ps
51
ps
38
ps
41
ps
44
ps
50
ps
57
ps
49
ps
1360MHZ DUAL OUTPUT LVPECL CLOCK SYNTHESIZER
8
REVISION 1 10/28/15