ICS843241I-04 Datasheet, PDF (7/14 Pages) Integrated Device Technology – FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V LVPECL CLOCK GENERATOR

ICS843241I-04
FEMTOCLOCKS™ CRYSTAL-TO- 3.3V, 2.5V LVPECL CLOCK GENERATOR
APPLICATION INFORMATION
PRELIMINARY
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise. To achieve optimum jitter perfor-
mance, power supply isolation is required. The ICS843241I-04
provides separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V_CC and V_CCA should
be individually connected to the power supply plane through vias,
and 0.01µF bypass capacitors should be used for each pin. Fig-
ure 1 illustrates this for a generic V pin and also shows that
CC
V
CCA
requires
that
an
additional10Ω
resistor
along
with
a
10µF
bypass capacitor be connected to the V_CCA pin.
3.3V or 2.5V
V_CC
.01μF 10Ω
V_CCA
.01μF
10μF
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS843241I-04 has been characterized with 18pF parallel
resonant crystals. The capacitor values, C1 and C2, shown in
Figure 2 below were determined using a 25MHz, 18pF parallel
resonant crystal and were chosen to minimize the ppm error. The
optimum C1 and C2 values can be slightly adjusted for different
board layouts.
X1
18pF Parallel Crystal
XTAL_IN
C1
33p
XTAL_OUT
C2
33p
FIGURE 2. CRYSTAL INPUt INTERFACE
IDT^™ / ICS^™ 150MHZ, 3.3V, 2.5V LVPECLCLOCK GENERATOR
7
ICS843241AGI-04 REV. A MAY 1, 2008