ICS843031-01 Datasheet, PDF (7/16 Pages) Integrated Device Technology – FEMTOCLOCKS™ CRYSTAL-TO- 3.3V, 2.5V LVPECL CLOCK GENERATOR

ICS843031-01
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V LVPECL CLOCK GENERATOR
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS843031-01 provides
separate power supplies to isolate any high switching noise
from the outputs to the internal PLL. V_CC and V_CCA should be
individually connected to the power supply plane through vias,
and bypass capacitors should be used for each pin. To achieve
optimum jitter performance, power supply isolation is required.
Figure 1 illustrates how a 10Ω resistor along with a 10μF and a
.01μF bypass capacitor should be connected to each V_CCA pin.
3.3V or 2.5V
V
CC
.01μF 10Ω
V_CCA
.01μF
10μF
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS843031-01 has been characterized with 18pF parallel
resonant crystals. The capacitor values, C1 and C2, shown in
Figure 2 below were determined using a 25MHz, 18pF parallel
resonant crystal and were chosen to minimize the ppm error.
The optimum C1 and C2 values can be slightly adjusted for
different board layouts.
X1
18pF Parallel Crystal
XTAL_OUT
C1
33p
XTAL_IN
C2
27p
FIGURE 2. CRYSTAL INPUt INTERFACE
IDT^™ / ICS^™ 3.3V, 2.5V LVPECL CLOCK GENERATOR
7
ICS843031AG-01 REV. A AUGUST 1, 2007