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9DBU0931_17 Datasheet, PDF (7/17 Pages) Integrated Device Technology – 9-Output 1.5V PCIe Gen1-2-3 Fanout Buffer
9DBU0931 DATASHEET
Electrical Characteristics–DIF Low-Power HCSL Outputs
TA = TAMB, Supply voltages per normal operation conditions; see Test Loads for loading conditions
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS NOTES
Slew rate
Slew rate matching
dV/dt
dV/dt
ΔdV/dt
Scope averaging on, fast setting
Scope averaging on, slow setting
Slew rate matching, scope averaging on
1.4 2.3 3.5 V/ns 1,2,3
0.9 1.5 2.5 V/ns 1,2,3
9.3 20 % 1,2,4
Voltage High
Voltage Low
VHIGH
VLOW
Statistical measurement on single-ended signal 630 750 850
7
using oscilloscope math function. (Scope
mV
averaging on)
-150 26 150
7
Max Voltage
Min Voltage
Vmax
Vmin
Measurement on single ended signal using
763 1150 mV
7
absolute value. (Scope averaging off)
-300 22
7
Vswing
Vswing
Scope averaging off
300 1448
mV 1,2
Crossing Voltage (abs) Vcross_abs
Scope averaging off
250 390 550 mV 1,5
Crossing Voltage (var)
Δ-Vcross
Scope averaging off
11 140 mV 1,6
1Guaranteed by design and characterization, not 100% tested in production.
2 Measured from differential waveform.
3 Slew rate is measured through the Vswing voltage range centered around differential 0V. This results in a +/-150mV window around
differential 0V.
4 Matching applies to rising edge rate for Clock and falling edge rate for Clock#. It is measured using a +/-75mV window centered on
the average cross point where Clock rising meets Clock# falling. The median cross point is used to calculate the voltage thresholds the
oscilloscope is to use for the edge rate calculations.
5 Vcross is defined as voltage where Clock = Clock# measured on a component test board and only applies to the differential rising
edge (i.e. Clock rising and Clock# falling).
6 The total variation of all Vcross measurements in any particular system. Note that this is a subset of Vcross_min/max (Vcross
absolute) allowed. The intent is to limit Vcross induced modulation by setting Δ-Vcross to be smaller than Vcross absolute.
7 At default SMBus settings.
Electrical Characteristics–Current Consumption
TA = TAMB, Supply voltages per normal operation conditions; see Test Loads for loading conditions
PARAMETER
SYMBOL
CONDITIONS
MIN
IDDA
VDDO1.5+VDDR, PLL Mode, at 100MHz
Operating Supply Current
IDD
VDDx, All outputs active at 100MHz
IDDIO
VDDIO, All outputs active at 100MHz
Powerdown Current
IDDAPD
IDDPD
VDDO1.5+VDDR, CKPWRGD_PD#=0
VDDx, CKPWRGD_PD#=0
IDDIOPD
VDDIO, CKPWRGD_PD#=0
1 Guaranteed by design and characterization, not 100% tested in production.
2 Input clock stopped.
TYP
2.2
4
35
0.4
0.2
0.0004
MAX
3
6
40
1
0.6
0.1
UNITS
mA
mA
mA
mA
mA
mA
NOTES
2
2
2
MARCH 9, 2017
7
9-OUTPUT 1.5V PCIE GEN1-2-3 FANOUT BUFFER