ICS84320-01 Datasheet, PDF (6/21 Pages) Integrated Circuit Systems – 780MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER

ICS84320-01
780MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL
LVPECL FREQUENCY SYNTHESIZER
TABLE 4C. LVPECL DC CHARACTERISTICS, V_CC = V_CCA = V_CCO = 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
V
Output High Voltage; NOTE 1
OH
V - 1.4
CCO
V - 0.9 V
CCO
V_OL
Output Low Voltage; NOTE 1
V_CCO - 2.0
V_CCO - 1.7
V
V_SWING Peak-to-Peak Output Voltage Swing
0.6
1.0
V
NOTE 1: Outputs terminated with 50 Ω to V_CCO - 2V. See "Parameter Measurement Information" section,
"3.3V Output Load Test Circuit".
TABLE 5. INPUT FREQUENCY CHARACTERISTICS, V_CC = V_CCA = V_CCO = 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
TEST_CLK; NOTE 1
14
40
MHz
f_IN
Input Frequency XTAL1, XTAL2; NOTE 1
S_CLOCK
14
40
MHz
50
MHz
NOTE 1: For the input crystal and TEST_CLK frequency range, the M value must be set for the VCO to operate within the
620MHz to780MHz range. Using the minimum input frequency of 14MHz, valid values of M are 45 ≤ M ≤ 55. Using the
maximum frequency of 40MHz, valid values of M are 16 ≤ M ≤ 19.
TABLE 6. CRYSTAL CHARACTERISTICS
Parameter
Test Conditions
Minimum Typical Maximum
Units
Mode of Oscillation
Fundamental
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
14
40
MHz
50
Ω
7
pF
Drive Level
1
mW
TABLE 7. AC CHARACTERISTICS, V_CC = V_CCA = V_CCO = 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum
F_OUT
Output Frequency
tjit(per) Period Jitter, RMS; NOTE 1
77.5
780
fOUT > 100MHz
2.0
2.6
tjit
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter Section
155.52MHz,
12kHz - 20MHz
2.5
tsk(o) Output Skew; NOTE 2, 3
15
t_R / t_F
Output Rise/Fall Time
20% to 80%
150
600
M, N to nP_LOAD
5
t_S
Setup Time S_DATA to S_CLOCK
5
S_CLOCK to S_LOAD
5
M, N to nP_LOAD
5
t_H
Hold Time S_DATA to S_CLOCK
5
S_CLOCK to S_LOAD
5
odc
Output Duty Cycle
N>1
49
51
fOUT ≤ 625
45
55
t_PW
Output Pulse Width
ƒ> 625
t_PERIOD/2 - 150
t_PERIOD/2 + 150
t_LOCK
PLL Lock Time
1
See Parameter Measurement Information section.
NOTE 1: Jitter performance using XTAL inputs.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential cross points.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
Units
MHz
ps
ps
ps
ps
ns
ns
ns
ns
ns
ns
%
%
ps
ms
84320AY-01
6
REV. C OCTOBER 22, 2007