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| 8312_15 Datasheet, PDF (6/18 Pages) Integrated Device Technology – Low Skew, 1-to-12 LVCMOS/LVTTL Fanout Buffer | |||
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8312 Datasheet
Table 4G. LVCMOS/LVTTL DC Characteristics, TA = 0°C to 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
VIH
Input High Voltage
VIL
Input Low Voltage
CLK
IIH
Input
High Current
OE, CLK_EN
VDD = 3.465V
VDD = 2.625V
VDD = 2.0V
VDD = 3.465V
VDD = 2.625V
VDD = 2.0V
VDD = VIN = 3.465V or
2.625V or 2.0V
VDD = VIN = 3.465V or
2.625V or 2.0V
2
1.7
0.65*VDD
-0.3
-0.3
-0.3
VDD + 0.3
V
VDD + 0.3
V
VDD + 0.3
V
1.3
V
0.7
V
0.35*VDD
V
150
µA
5
µA
IIL
Input
Low Current
CLK
OE, CLK_EN
VDD = 3.465V or 2.625V or 2.0V,
VIN = 0V
VDD = 3.465V or 2.625V or 2.0V,
VIN = 0V
-5
-150
VDDO = 3.3V ± 5%
2.6
VDDO = 2.5V ± 5%;
1.8
VOH
Output High Voltage; NOTE 1
VDDO = 2.5V ± 5%; IOH = -1mA
2
VDDO = 1.8V ± 0.2V
VDD â 0.3
VDDO = 1.8V ± 0.2V; IOH = -100µA VDD â 0.2
VDDO = 3.3V ± 5%
VDDO = 2.5V ± 5%;
VOL
Output Low Voltage; NOTE 1
VDDO = 2.5V ± 5%; IOL = 1mA
VDDO = 1.8V ± 0.2V
VDDO = 1.8V ± 0.2V; IOL = 100µA
µA
µA
V
V
V
V
V
0.5
V
0.45
V
0.4
V
0.35
V
0.2
V
NOTE 1: Outputs terminated with 50ï to VDDO/2. See Parameter Measurement Information, Output Load Test Circuit diagrams.
©2015 Integrated Device Technology, Inc
6
December 11, 2015
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