82P33813 Datasheet, PDF (6/13 Pages) Integrated Device Technology – Synchronization Management Unit for IEEE 1588 and synchronous Ethernet

82P33813 Short Form Datasheet
Table 1: Pin Description (Continued)
Pin No.
30
28
25
26
21
22
63
61
60
13
55
57
46
45
47
Name
I/O
Type
Description
Output Clock
OUT1
OUT2
OUT3_POS
OUT3_NEG
OUT4_POS
OUT4_NEG
OUT5
OUT6
OUT7
VC
O
CMOS ^{OUT1 ~ OUT2: Output Clock 1 ~ 2}
O
PECL/LVDS
OUT3_POS / OUT3_NEG: Positive / Negative Output Clock 3
This output is set to LVDS by default.
O
PECL/LVDS
OUT4_POS / OUT4_NEG: Positive / Negative Output Clock 4
This output is set to LVDS by default.
O
CMOS OUT5: Output Clock 5
O
CMOS ^{OUT6 ~ OUT7: Output Clock 6 ~ 7}
Miscellaneous
VC: APLL VC Output
O
Analog An external RC filter (a resistor in series with a capacitor to ground, and another capacitor in
parallel) should be connected to this pin.
DPLL_LOCK
O
CMOS
Lock Signal
DPLL_LOCK
This pin goes high when the DPLL is locked
INT_REQ
MPU_MODE1/
I2CM_SCL
MPU_MODE0/
I2CM_SDA
O
Tri-state
I/O
pull-up
Microprocessor Interface
CMOS
INT_REQ: Interrupt Request
This pin is used as an interrupt request.
MPU_MODE[1:0]: Microprocessor Interface Mode Selection
During reset, these pins determine the default value of the MPU_SEL_CNFG[1:0] bits as fol-
lows:
00: I2C mode
CMOS/
Open Drain
01: SPI mode
10: UART mode
11: I2C master (EEPROM) mode
I2CM_SCL: Serial Clock Line
In I2C master mode, the serial clock is output on this pin.
I2CM_SDA: Serial Data Input for I2C Master Mode
In I2C master mode, this pin is used as the for the serial data.
SDI: Serial Data Input
In Serial mode, this pin is used as the serial data input. Address and data on this pin are seri-
ally clocked into the device on the rising edge of SCLK.
SDI/I2C_AD2/
I
UART_RX pull-down
CMOS
I2C_AD2: Device Address Bit 2
In I2C mode, I2C_AD[2:0] pins are the address bus of the microprocessor interface.
UART_RX
In UART mode, this pin is used as the receive data (UART Receive)
CLKE: SCLK Active Edge Selection
In Serial mode, this pin is an input, it selects the active edge of SCLK to update the SDO:
48
CLKE/I2C_AD1
I
pull-down
CMOS
High - The falling edge;
Low - The rising edge.
I2C_AD1: Device Address Bit 1
In I2C mode, I2C_AD[2:0] pins are the address bus of the microprocessor interface.
CS: Chip Selection
In Serial modes, this pin is an input.A transition from high to low must occur on this pin for
49
CS/I2C_AD0
I
pull-up
CMOS ^{each read or write operation and this pin should remain low until the operation is over.}
I2C_AD0: Device Address Bit 0
In I2C mode, I2C_AD[2:0] pins are the address bus of the microprocessor interface.
©2016 Integrated Device Technology, Inc.
6
March 16, 2016