IDT82V2044E Datasheet, PDF (55/73 Pages) Integrated Device Technology – QUAD CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT

QUAD CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT
INDUSTRIAL
TEMPERATURE RANGES
Table-54 TAP Controller State Description (Continued)
STATE
Pause-IR
Exit2-IR
Update-IR
DESCRIPTION
The pause state allows the test controller to temporarily halt the shifting of data through the instruction register. The test data register
selected by the current instruction retains its previous value and the instruction does not change during this state. The controller remains in
this state as long as TMS is low. When TMS goes high and a rising edge is applied to TCK, the controller moves to the Exit2-IR state.
This is a temporary state. While in this state, if TMS is held high, a rising edge applied to TCK causes the controller to enter the Update-IR
state, which terminates the scanning process. If TMS is held low and a rising edge is applied to TCK, the controller enters the Shift-IR state.
The test data register selected by the current instruction retains its previous value and the instruction does not change during this state.
The instruction shifted into the instruction register is latched into the parallel output from the shift-register path on the falling edge of TCK.
When the new instruction has been latched, it becomes the current instruction. The test data registers selected by the current instruction
retain their previous value.
1
Test-logic Reset
0
0
1
Run Test/Idle
1
Select-DR
0
1
Capture-DR
0
0
Shift-DR
1
Exit1-DR ¹
0
0
Pause-DR
1
0
Exit2-DR
1
Update-DR
10
1
Select-IR
0
1
Capture-IR
0
0
Shift-IR
1
1
Exit1-IR
0
0
Pause-IR
1
0
Exit2-IR
1
Update-IR
10
Figure-22 JTAG State Diagram
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