ICS9173B Datasheet, PDF (5/9 Pages) Integrated Device Technology – VIDEO GENLOCK PLL

IDT9173B
VIDEO GENLOCK PLL
CLOCK SYNTHESIZER
DC Electrical Characteristics
Unless stated otherwise, VDD = 5 V ±5%, Ambient Temperature 0 to +70° C
Parameter
Symbol Conditions
Min.
Operating Supply Current
IDD No load,50 MHz
Input Low Voltage
Input High Voltage
Input Low Current
Input High Current
Output Low Voltage
Output High Voltage ¹
Output High Voltage ¹
Output High Voltage ¹
V_IH
V_IL
I_IL
I_IH
V_OL
V_OH1
V_OH2
V_OH3
VDD = 5 V
VDD = 5 V
VIN = 0V
VIN = VDD
I_OL = 8 mA
I_OH = -1 mA
I_OH = -4 mA
I_OH = -8 mA
2.0
-5
-5
VDD-0.4
VDD-0.8
2.4
Typ.
20
Max.
50
0.8
5
0.4
Units
mA
V
V
µA
µA
V
V
V
V
Notes:
1. Duty cycle measured at 1.4 V.
2. Input Reference Frequency = 25 kHz, Output Frequency = 25 MHz. Jitter measured between adjacent vertical
pixels.
3. CLK1 frequency applies for FS = 0. For FS = 1 condition, divide allowable CLK1 range by the factor of 4.
AC Electrical Characteristics
Unless stated otherwise, VDD = 5 V ±5%, Ambient Temperature 0 to +70° C
Parameter
Output Clock Rise Time ¹
Output Clock Fall Time ¹
Output Rise Time ¹
Output Rise Time ¹
Output Fall Time ¹
Output Fall Time ¹
Output Duty Cycle ¹
One-Sigma Jitter ^{1, 5}
Jitter, Absolute ^{1, 5}
One-Sigma Jitter ^{1, 5}
Jitter, Absolute ^{1, 5}
Line-to-Line Jitter ¹, Absolute ²
Input Frequency ¹, IN or FBIN
Symbol
Conditions
ICLK_r
ICLK_f
t_r1
t_r2
t_f1
t_f2
T1_S1
T_ABS1
T1_S2
T_ABS2
T_LABS
f_IN
15 pF load, 20% to 80%
15 pF load, 20% to 80%
15 pF load, 80% to 20%
15 pF load, 80% to 20%
15 pF load
CLK1 frequency ³, 25 MHz
CLK1 frequency ³, 25 MHz
CLK1 frequency < 25 MHz
CLK1 frequency < 25 MHz
see allowable fi below
Min.
40
-400
12
Typ.
0.6
1.4
0.8
0.8
47
120
±250
±4
Max.
10
10
1.5
3.0
2.0
2.0
55
250
400
1
2
1000
Units
ns
ns
ns
ns
ns
ns
%
ps
ps
%
%
ns
kHz
IDT™ VIDEO GENLOCK PLL
5
IDT9173B
REV B 111209