F1792 Datasheet, PDF (5/32 Pages) Integrated Device Technology – RF Wideband Gain-Settable e

F1792 Datasheet
Electrical Characteristics
Table 4. IDTF1792 Specification (General)
Typical Application Circuit, VCC = +3.3V, TC = +25°C, FRF = 900MHz, FIF = 199MHz, FLO = 1099MHz, PLO = 0 dBm, PIN = -10dBm per tone for
all gain settings unless otherwise stated, STBY = LOW. EVkit IF transformer losses are de-embedded unless otherwise noted.
Parameter
Symbol
Conditions
Minimum Typical
Logic Input High³
VIH3
-
1.1¹
Logic Input Low³
VIL3
Minimum attenuation
Logic Current
IIH, IIL
For all control pins
-5
Supply Current
ICH_LB
Low band LO
134
Supply Current
ICH_MB
Mid band LO
140
Supply Current
ICH_HB
High band LO
147
Supply Current – reduced
FRF = 2.2GHz, FLO = 2GHz
113
linearity
OIP3 = +20dBm max gain
IFRef_Bias resistor = 3.9Kohm
Shutdown current
ISD
3
Pin = -13 dBm
340
TSETT
Gate STBY pin
Time for IF Signal to settle from 50%
STBY to within 90% of final value
Settling Time
Pin = -13 dBm
920
Gate STBY pin
Time for IF Signal to settle from 50%
STBY to within 0.1 dB of final value
Pin = -13 dBm
75
Gate Gain Select pins per Gain
Control table
Time for IF Signal to settle from 50%
Gain Select to within 90% of final
value
RFIN Impedance
ZRFIN
Single Ended
50
LO Port Impedance
ZLO
Single Ended
50
IF Output Impedance
ZIF
Differential
200
IF Return Loss
RLIF
Differential 200 ohm with 4:1 Balun
-15
LO Return Loss
RLLO
Single Ended 50 ohm
-15
NOTE 1: Items in min/max columns in bold italics are Guaranteed by Test.
NOTE 2: Items in min/max columns that are not bold/italics are Guaranteed by Design Characterization.
NOTE 3: JEDEC 3.3V and JEDEC 1.8V logic
Maximum
0.65
+100
154
160
166
135
Units
V
V
mA
mA
mA
mA
mA
6
mA
nsec
nsec
nsec
Ω
Ω
Ω
dB
dB
© 2016 Integrated Device Technology, Inc
5
April 5, 2016