74FCT540 Datasheet, PDF (5/6 Pages) Integrated Device Technology – FAST CMOS OCTAL BUFFER/LINE DRIVER

IDT74FCT540AT/CT
FAST CMOS OCTAL BUFFER/LINE DRIVER
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
V CC
7.0V
V IN
Pulse
Generator
D.U.T.
RT
V OUT
50pF
CL
500Ω
500Ω
O ctal lin k
SWITCH POSITION
Test
Switch
Open Drain
Disable Low
Closed
Enable Low
All Other Tests
Open
8-link
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
SET-UP, HOLD, AND RELEASE TIMES
DATA
INPUT
TIMING
INPUT
tSU
tH
ASYNCHRONOUS CONTROL
PRESET
tREM
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
tSU
tH
ETC.
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
O ctal lin k
PULSE WIDTH
LO W -HIGH-LOW
PULSE
H IG H -L O W -H IG H
PULSE
1.5V
tW
1.5V
O ctal lin k
PROPAGATION DELAY
SAME PHASE
INPUT TRANSITION
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
3V
1.5V
0V
VOH
1.5V
VOL
3V
1.5V
0V
O ctal lin k
ENABLE AND DISABLE TIMES
ENABLE
CONTROL
INPUT
OUTPUT
NORMALLY
LOW
tPZL
S W IT C H
CLOSED
tPZH
OUTPUT
NORMALLY
HIGH
S W IT C H
OPEN
DISABLE
3V
1.5V
0V
tPLZ
3.5V
3.5V
1.5V
tPHZ
0.3V _VOL
1.5V
0.3V ^VOH
0V
0V
O ctal lin k
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
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