IDT82P20416 Datasheet, PDF (47/121 Pages) Integrated Device Technology – 16-Channel Short Haul T1/E1/J1 Line Interface Unit

IDT82P20416
16-CHANNEL SHORT HAUL T1/E1/J1 LINE INTERFACE UNIT
3.6 CLOCK INPUTS AND OUTPUTS
The IDT82P20416 provides two kinds of clock outputs:
• Free running clock outputs on CLKT1 and CLKE1
The following Clock Input is provided:
• MCLK as programmable reference timing for the IDT82P20416.
3.6.1 FREE RUNNING CLOCK OUTPUTS ON CLKT1/CLKE1
An internal clock generator uses MCLK as reference to generate all
the clocks required by internal circuits and CLKT1/CLKE1 outputs.
MCLK should be a clock with +/-32 ppm (in T1/J1 mode) or +/-50 ppm
(in E1 mode) accuracy. The clock frequency of MCLK is 1.544/2.048 X N
MHz (1 ≤ N ≤ 8, N is an integer number), as determined by
MCKSEL[3:0]. Refer to Chapter 2 Pin Description for details.
The outputs on CLKT1 and CLKE1 are free running (locking to
MCLK). The output of CLKT1 is determined by the CLKT1_EN bit (b1,
CLKG) and the CLKT1 bit (b0, CLKG). Refer to Table-21. The output of
CLKE1 is determined by the CLKE1_EN bit (b3, CLKG) and the CLKE1
bit (b2, CLKG). Refer to Table-22.
Table-21 Clock Output on CLKT1
Control Bits
CLKT1_EN
0
1
CLKT1
(don’t-care)
0
1
Table-22 Clock Output on CLKE1
Control Bits
CLKE1_EN
0
1
CLKE1
(don’t-care)
0
1
Clock Output On CLKT1
High-Z
8 KHz
1.544 KHz
Clock Output On CLKE1
High-Z
8 KHz
2.048 KHz
Functional Description
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December 17, 2009