7201LA35J Datasheet, PDF (4/14 Pages) Integrated Device Technology – First-In/First-Out dual-port memory

IDT7201L/7201LA/7202LA CMOS ASYNCHRONOUS FIFO
256 x 9, 512 x 9 and 1,024 x 9
COMMERCIAL, INDUSTRIAL AND MILITARY
TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS⁽¹⁾
(Commercial: VCC = 5V ± 10%, TA = 0°C to +70°C; Industrial: VCC = 5V ± 10%, TA = –40°C to +85°C; Military: VCC = 5V ± 10%, TA = –55°C to +125°C)
Commercial
Com'l & Ind'l⁽²⁾
Com'l & Mil.
Com'l & Ind'l⁽²⁾
Symbol Parameter
IDT7200L12
IDT7201LA12
IDT7202LA12
Min.
Max.
IDT7200L15
IDT7201LA15
IDT7202LA15
Min.
Max.
IDT7200L20
IDT7201LA20
IDT7202LA20
Min.
Max.
IDT7200L25
IDT7201LA25
IDT7202LA25
Min.
Max. Unit
tS
Shift Frequency
—
50
—
40
—
33.3
—
28.5 MHz
tRC
Read Cycle Time
20
—
25
—
30
—
35
—
ns
tA
Access Time
—
12
—
15
—
20
—
25
ns
tRR
Read Recovery Time
8
—
10
—
10
—
10
—
ns
tRPW
Read Pulse Width⁽³⁾
12
—
15
—
20
—
25
—
ns
tRLZ
Read Pulse Low to Data Bus at Low Z⁽⁴⁾
3
—
3
—
3
—
3
—
ns
tWLZ
Write Pulse High to Data Bus at Low Z^(4,5)
5
—
5
—
5
—
5
—
ns
tDV
Data Valid from Read Pulse High
5
—
5
—
5
—
5
—
ns
tRHZ
Read Pulse High to Data Bus at High Z⁽⁴⁾
—
12
—
15
—
15
—
18
ns
tWC
Write Cycle Time
20
—
25
—
30
—
35
—
ns
tWPW
Write Pulse Width⁽³⁾
12
—
15
—
20
—
25
—
ns
tWR
Write Recovery Time
8
—
10
—
10
—
10
—
ns
tDS
Data Set-up Time
9
—
11
—
12
—
15
—
ns
tDH
Data Hold Time
0
—
0
—
0
—
0
—
ns
tRSC
Reset Cycle Time
20
—
25
—
30
—
35
—
ns
tRS
Reset Pulse Width⁽³⁾
12
—
15
—
20
—
25
—
ns
tRSS
Reset Set-up Time⁽⁴⁾
12
—
15
—
20
—
25
—
ns
tRSR
Reset Recovery Time
8
—
10
—
10
—
10
—
ns
tRTC
Retransmit Cycle Time
20
—
25
—
30
—
35
—
ns
tRT
Retransmit Pulse Width⁽³⁾
12
—
15
—
20
—
25
—
ns
tRTS
Retransmit Set-up Time⁽⁴⁾
12
—
15
—
20
—
25
—
ns
tRTR
Retransmit Recovery Time
8
—
10
—
10
—
10
—
ns
tEFL
Reset to Empty Flag Low
—
12
—
25
—
30
—
35
ns
tHFH,FFH ResettoHalf-FullandFullFlagHigh
—
17
—
25
—
30
—
35
ns
tRTF
Retransmit Low to Flags Valid
—
20
—
25
—
30
—
35
ns
tREF
Read Low to Empty Flag Low
—
12
—
15
—
20
—
25
ns
tRFF
Read High to Full Flag High
—
14
—
15
—
20
—
25
ns
tRPE
Read Pulse Width after EF High
12
—
15
—
20
—
25
—
ns
tWEF
Write High to Empty Flag High
—
12
—
15
—
20
—
25
ns
tWFF
Write Low to Full Flag Low
—
14
—
15
—
20
—
25
ns
tWHF
Write Low to Half-Full Flag Low
—
17
—
25
—
30
—
35
ns
tRHF
Read High to Half-Full Flag High
—
17
—
25
—
30
—
35
ns
tWPF
Write Pulse Width after FF High
12
—
15
—
20
—
25
—
ns
tXOL
Read/Write to XO Low
—
12
—
15
—
20
—
25
ns
tXOH
Read/Write to XO High
—
12
—
15
—
20
—
25
ns
tXI
XI Pulse Width⁽³⁾
12
—
15
—
20
—
25
—
ns
tXIR
XI Recovery Time
8
—
10
—
10
—
10
—
ns
tXIS
XI Set-up Time
8
—
10
—
10
—
10
—
ns
NOTES:
1. Timings referenced as in AC Test Conditions.
2. Industrial temperature range product for 15ns and 25ns speed grades are available as a standard device.
3. Pulse widths less than minimum value are not allowed.
4. Values guaranteed by design, not currently tested.
5. Only applies to read data flow-through mode
4