English
Language : 

IDT72V3656 Datasheet, PDF (34/39 Pages) Integrated Device Technology – 3.3 VOLT CMOS TRIPLE BUS SyncFIFOTM WITH BUS-MATCHING
IDT72V3656/72V3666/72V3676 3.3V CMOS TRIPLE BUS SyncFIFOTM
WITH BUS MATCHING 2,048 x 36 x 2, 4,096 x 36 x 2 and 8,192 x 36 x 2
CLKA
CSA
W/RA
MBA
ENA
A0-A35
tENS1
tENS1
tENH
tENH
tENS2
tENS2
tENH
tENH
t DS
tDH
W1
COMMERCIAL TEMPERATURE RANGE
CLKB
MBF1
tPMF
tPMF
CSB
MBB
tENS2
tENH
RENB
tEN
tPMR
tMDV
tDIS
B0-B17
FIFO1 Output Register
W1 (Remains valid in Mail1 Register after read)
NOTE:
4665 drw29
1. If Port B is configured for word size, data can be written to the Mail1 register using A0-A17 (A18-A35 are don't care inputs). In this first case B0-B17 will have valid data. If Port
B is configured for byte size, data can be written to the Mail1 Register using A0-A8 (A9-A35 are don't care inputs). In this second case, B0-B8 will have valid data (B9-B17 will
be indeterminate).
Figure 28. Timing for Mail1 Register and MBF1 Flag (IDT Standard and FWFT Modes)
CLKC
MBC
ENC
C0-C17
tENS2
tENS2
tENH
tENH
tDS
tDH
W1
CLKA
MBF2
tPMF
tPMF
CSA
W/RA
MBA
tENS2
tENH
ENA
A0-A35
tEN
tPMR
tMDV
FIFO2 Output Register
tDIS
W1 (Remains valid in Mail2 Register after read)
NOTE:
4665 drw30
1. If Port C is configured for word size, data can be written to the Mail2 register using C0-C17. In this first case, A18-A35 will have valid data (A0-A17 will be indeterminate). If Port C is configured
for byte size, data can be written to the Mail2 register using C0-C8 (C9-C17 are don't care inputs). In this second case, A18-A26 will have valid data (A0-A17 and A27-A35 will be
indeterminate).
Figure 29. Timing for Mail2 Register and MBF2 Flag (IDT Standard and FWFT Modes)
34