92HD65C Datasheet, PDF (33/268 Pages) Integrated Device Technology – SIX CHANNEL HD AUDIO CODECS

92HD65C
SIX CHANNEL HD AUDIO CODEC WITH DUAL CAPLESS HEADPHONE AMPLIFIERS
1. Default at power-on is SPDIF_OUT/DMIC1 for pin 48 (40) and SPDIF_OUT/DMIC1 for pin
46(38)
2. If GPIO is enabled for that pin, it overrides the SPDIF_OUT and DMIC functions for that pin.
3. If the GPIO function is not enabled for that pin, then the DMIC or SPDIF_OUT function may be
enabled by setting the pin input or output enable to 1, respectively. (Setting input and output
enable to 1 at the same time will only enable DMIC)
Note: If the pin selected for DMIC1 input is configured as an output or GPIO, the DMIC block will
behave as if silence is present at the input.
GPIO3 Dig0Pin Input
Enable
Enable
0
0
0
1
1
NA
Dig0Pin Output
Enable
Selected by
DMIC1Vol (NID
0x12)
0
NA
1
NA
NA
No
Yes
NA
NA
Function
Unused (input)
SPDIF0 output
Unused (input)
DMIC1 input
GPIO3
Table 18. Dig0Pin (Pin 48/40) Function Selection
GPIO0 Dig1Pin Input
Enable
Enable
0
0
0
1
1
NA
Dig1Pin Output
Enable
Selected by
DMIC1Vol (NID
0x12)
0
NA
1
NA
NA
No
Yes
NA
NA
Function
Unused (input)
SPDIF1 output
Unused (input)
DMIC1 input
GPIO0
Table 19. Dig1Pin (Pin 46/38) Function Selection
2.24. HD Audio ECR 15b support
The codec implements complete support for the HDA015-B specification building on the support
already present in previous products. HDA015-B features supported are:
1. Persistence of many configuration options through bus and function group reset.
2. The ability to support port presence detect in D3 even when the HD Audio bus is in a low power
state (no clock.)
3. Fast resume times from low power states: 1ms D1 to D0, 2ms D2 to D0, 10mS D3 to D0.
4. Notification if persistent register settings have been unexpectedly reset.
5. SPDIF Out active in D3 (required)
6. The ability to notify the driver that a clock is necessary so entering D3 with the clock stopped is
not permissible
2.25. Digital Core Voltage Regulator
The digital core operates from 1.8V (+/- 10%). Many systems require that the CODEC use a single
3.3V digital supply, so an integrated regulator is included on die. The regulator uses pin 9, DVDD, as
its voltage source. The output of the LDO is connected to pin 1 and the digital core. A 10uF capacitor
must be placed on pin 1 for proper load regulation and regulator stability.
IDT CONFIDENTIAL
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92HD65C