ADC1410S Datasheet, PDF (31/38 Pages) NXP Semiconductors – Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs

Integrated Device Technology
ADC1410S series
Single 14-bit ADC; CMOS or LVDS DDR digital output
Table 20. Reset and operating mode control register (address 0005h) bit description
Default values are highlighted.
Bit
Symbol
Access Value Description
7
SW_RST
R/W
reset digital section
0
no reset
1
performs a reset of the SPI registers
6 to 4 RESERVED[2:0]
000
reserved
3 to 2 -
00
not used
1 to 0 OP_MODE[1:0]
R/W
operating mode
00
normal (power-up)
01
power-down
10
sleep
11
normal (power-up)
Table 21. Clock control register (address 0006h) bit description
Default values are highlighted.
Bit
Symbol
Access Value Description
7 to 5 -
000
not used
4
SE_SEL
R/W
single-ended clock input pin select
0
CLKM
1
CLKP
3
DIFF_SE
R/W
differential/single-ended clock input select
0
fully differential
1
single-ended
2
-
0
not used
1
CLKDIV
R/W
clock input divide by 2
0
disabled
1
enabled
0
DCS_EN
R/W
duty cycle stabilizer
0
disabled
1
enabled
ADC1410S_SER 5
Product data sheet
Rev. 05 — 2 July 2012
© IDT 2012. All rights reserved.
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