79RC32351 Datasheet, PDF (31/42 Pages) Integrated Device Technology – IDT Interprise Integrated Communications Processor

IDT 79RC32351
Signal
Symbol
Reference ^100MHz
Edge
Min Max
133MHz
Min Max
Unit
GPIOP
GPIOP[31:0]¹
Tsu1
CLKP rising 4 — 4 —
ns
Thld1
1.4 — 1.4 —
ns
Tdo1
GPIOP[35:32]²
Tsu1
2828
ns
3—3—
ns
Thld1
1—1—
ns
Tdo1
3838
ns
1 _{GPIO[31:0] can be asynchronous signals; the values are provided for ATE (test) only.}
2 _{GPIOP[35:32] are synchronous signals.}
Table 12 GPIOP AC Timing Characteristics
Timing
Conditions Diagram
Reference
Figure 16
CLKP
GPIOP (output)
GPIOP (input)
Tdo1
Tsu1
Thld1
Tdo1
Figure 16 GPIOP AC Timing Waveform
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May 25, 2004